736 lines
35 KiB
C
736 lines
35 KiB
C
/**
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******************************************************************************
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* @file stm32f1xx_hal_i2c.h
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* @author MCD Application Team
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* @brief Header file of I2C HAL module.
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F1xx_HAL_I2C_H
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#define __STM32F1xx_HAL_I2C_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f1xx_hal_def.h"
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/** @addtogroup STM32F1xx_HAL_Driver
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* @{
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*/
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/** @addtogroup I2C
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup I2C_Exported_Types I2C Exported Types
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* @{
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*/
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/** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition
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* @brief I2C Configuration Structure definition
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* @{
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*/
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typedef struct
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{
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uint32_t ClockSpeed; /*!< Specifies the clock frequency.
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This parameter must be set to a value lower than 400kHz */
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uint32_t DutyCycle; /*!< Specifies the I2C fast mode duty cycle.
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This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */
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uint32_t OwnAddress1; /*!< Specifies the first device own address.
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This parameter can be a 7-bit or 10-bit address. */
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uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
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This parameter can be a value of @ref I2C_addressing_mode */
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uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
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This parameter can be a value of @ref I2C_dual_addressing_mode */
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uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected
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This parameter can be a 7-bit address. */
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uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
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This parameter can be a value of @ref I2C_general_call_addressing_mode */
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uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
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This parameter can be a value of @ref I2C_nostretch_mode */
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} I2C_InitTypeDef;
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/**
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* @}
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*/
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/** @defgroup HAL_state_structure_definition HAL state structure definition
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* @brief HAL State structure definition
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* @note HAL I2C State value coding follow below described bitmap :
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* b7-b6 Error information
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* 00 : No Error
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* 01 : Abort (Abort user request on going)
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* 10 : Timeout
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* 11 : Error
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* b5 Peripheral initilisation status
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* 0 : Reset (Peripheral not initialized)
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* 1 : Init done (Peripheral initialized and ready to use. HAL I2C Init function called)
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* b4 (not used)
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* x : Should be set to 0
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* b3
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* 0 : Ready or Busy (No Listen mode ongoing)
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* 1 : Listen (Peripheral in Address Listen Mode)
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* b2 Intrinsic process state
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* 0 : Ready
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* 1 : Busy (Peripheral busy with some configuration or internal operations)
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* b1 Rx state
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* 0 : Ready (no Rx operation ongoing)
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* 1 : Busy (Rx operation ongoing)
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* b0 Tx state
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* 0 : Ready (no Tx operation ongoing)
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* 1 : Busy (Tx operation ongoing)
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* @{
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*/
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typedef enum
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{
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HAL_I2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */
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HAL_I2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */
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HAL_I2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */
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HAL_I2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */
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HAL_I2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
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HAL_I2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */
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HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission
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process is ongoing */
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HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception
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process is ongoing */
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HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */
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HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */
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HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */
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} HAL_I2C_StateTypeDef;
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/**
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* @}
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*/
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/** @defgroup HAL_mode_structure_definition HAL mode structure definition
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* @brief HAL Mode structure definition
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* @note HAL I2C Mode value coding follow below described bitmap :\n
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* b7 (not used)\n
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* x : Should be set to 0\n
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* b6\n
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* 0 : None\n
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* 1 : Memory (HAL I2C communication is in Memory Mode)\n
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* b5\n
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* 0 : None\n
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* 1 : Slave (HAL I2C communication is in Slave Mode)\n
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* b4\n
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* 0 : None\n
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* 1 : Master (HAL I2C communication is in Master Mode)\n
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* b3-b2-b1-b0 (not used)\n
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* xxxx : Should be set to 0000
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* @{
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*/
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typedef enum
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{
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HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */
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HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */
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HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */
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HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */
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} HAL_I2C_ModeTypeDef;
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/**
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* @}
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*/
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/** @defgroup I2C_Error_Code_definition I2C Error Code definition
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* @brief I2C Error Code definition
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* @{
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*/
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#define HAL_I2C_ERROR_NONE 0x00000000U /*!< No error */
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#define HAL_I2C_ERROR_BERR 0x00000001U /*!< BERR error */
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#define HAL_I2C_ERROR_ARLO 0x00000002U /*!< ARLO error */
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#define HAL_I2C_ERROR_AF 0x00000004U /*!< AF error */
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#define HAL_I2C_ERROR_OVR 0x00000008U /*!< OVR error */
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#define HAL_I2C_ERROR_DMA 0x00000010U /*!< DMA transfer error */
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#define HAL_I2C_ERROR_TIMEOUT 0x00000020U /*!< Timeout Error */
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#define HAL_I2C_ERROR_SIZE 0x00000040U /*!< Size Management error */
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#define HAL_I2C_ERROR_DMA_PARAM 0x00000080U /*!< DMA Parameter Error */
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#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
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#define HAL_I2C_ERROR_INVALID_CALLBACK 0x00000100U /*!< Invalid Callback error */
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#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
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/**
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* @}
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*/
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/** @defgroup I2C_handle_Structure_definition I2C handle Structure definition
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* @brief I2C handle Structure definition
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* @{
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*/
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typedef struct __I2C_HandleTypeDef
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{
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I2C_TypeDef *Instance; /*!< I2C registers base address */
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I2C_InitTypeDef Init; /*!< I2C communication parameters */
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uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */
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uint16_t XferSize; /*!< I2C transfer size */
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__IO uint16_t XferCount; /*!< I2C transfer counter */
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__IO uint32_t XferOptions; /*!< I2C transfer options */
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__IO uint32_t PreviousState; /*!< I2C communication Previous state and mode
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context for internal usage */
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DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */
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DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */
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HAL_LockTypeDef Lock; /*!< I2C locking object */
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__IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */
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__IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */
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__IO uint32_t ErrorCode; /*!< I2C Error code */
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__IO uint32_t Devaddress; /*!< I2C Target device address */
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__IO uint32_t Memaddress; /*!< I2C Target memory address */
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__IO uint32_t MemaddSize; /*!< I2C Target memory address size */
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__IO uint32_t EventCount; /*!< I2C Event counter */
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#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
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void (* MasterTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Master Tx Transfer completed callback */
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void (* MasterRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Master Rx Transfer completed callback */
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void (* SlaveTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Slave Tx Transfer completed callback */
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void (* SlaveRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Slave Rx Transfer completed callback */
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void (* ListenCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Listen Complete callback */
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void (* MemTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Memory Tx Transfer completed callback */
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void (* MemRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Memory Rx Transfer completed callback */
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void (* ErrorCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Error callback */
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void (* AbortCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Abort callback */
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void (* AddrCallback)(struct __I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< I2C Slave Address Match callback */
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void (* MspInitCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Msp Init callback */
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void (* MspDeInitCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Msp DeInit callback */
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#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
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} I2C_HandleTypeDef;
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#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
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/**
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* @brief HAL I2C Callback ID enumeration definition
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*/
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typedef enum
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{
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HAL_I2C_MASTER_TX_COMPLETE_CB_ID = 0x00U, /*!< I2C Master Tx Transfer completed callback ID */
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HAL_I2C_MASTER_RX_COMPLETE_CB_ID = 0x01U, /*!< I2C Master Rx Transfer completed callback ID */
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HAL_I2C_SLAVE_TX_COMPLETE_CB_ID = 0x02U, /*!< I2C Slave Tx Transfer completed callback ID */
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HAL_I2C_SLAVE_RX_COMPLETE_CB_ID = 0x03U, /*!< I2C Slave Rx Transfer completed callback ID */
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HAL_I2C_LISTEN_COMPLETE_CB_ID = 0x04U, /*!< I2C Listen Complete callback ID */
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HAL_I2C_MEM_TX_COMPLETE_CB_ID = 0x05U, /*!< I2C Memory Tx Transfer callback ID */
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HAL_I2C_MEM_RX_COMPLETE_CB_ID = 0x06U, /*!< I2C Memory Rx Transfer completed callback ID */
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HAL_I2C_ERROR_CB_ID = 0x07U, /*!< I2C Error callback ID */
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HAL_I2C_ABORT_CB_ID = 0x08U, /*!< I2C Abort callback ID */
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HAL_I2C_MSPINIT_CB_ID = 0x09U, /*!< I2C Msp Init callback ID */
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HAL_I2C_MSPDEINIT_CB_ID = 0x0AU /*!< I2C Msp DeInit callback ID */
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} HAL_I2C_CallbackIDTypeDef;
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/**
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* @brief HAL I2C Callback pointer definition
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*/
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typedef void (*pI2C_CallbackTypeDef)(I2C_HandleTypeDef *hi2c); /*!< pointer to an I2C callback function */
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typedef void (*pI2C_AddrCallbackTypeDef)(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< pointer to an I2C Address Match callback function */
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#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup I2C_Exported_Constants I2C Exported Constants
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* @{
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*/
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/** @defgroup I2C_duty_cycle_in_fast_mode I2C duty cycle in fast mode
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* @{
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*/
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#define I2C_DUTYCYCLE_2 0x00000000U
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#define I2C_DUTYCYCLE_16_9 I2C_CCR_DUTY
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/**
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* @}
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*/
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/** @defgroup I2C_addressing_mode I2C addressing mode
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* @{
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*/
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#define I2C_ADDRESSINGMODE_7BIT 0x00004000U
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#define I2C_ADDRESSINGMODE_10BIT (I2C_OAR1_ADDMODE | 0x00004000U)
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/**
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* @}
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*/
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/** @defgroup I2C_dual_addressing_mode I2C dual addressing mode
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* @{
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*/
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#define I2C_DUALADDRESS_DISABLE 0x00000000U
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#define I2C_DUALADDRESS_ENABLE I2C_OAR2_ENDUAL
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/**
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* @}
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*/
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/** @defgroup I2C_general_call_addressing_mode I2C general call addressing mode
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* @{
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*/
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#define I2C_GENERALCALL_DISABLE 0x00000000U
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#define I2C_GENERALCALL_ENABLE I2C_CR1_ENGC
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/**
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* @}
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*/
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/** @defgroup I2C_nostretch_mode I2C nostretch mode
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* @{
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*/
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#define I2C_NOSTRETCH_DISABLE 0x00000000U
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#define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH
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/**
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* @}
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*/
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/** @defgroup I2C_Memory_Address_Size I2C Memory Address Size
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* @{
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*/
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#define I2C_MEMADD_SIZE_8BIT 0x00000001U
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#define I2C_MEMADD_SIZE_16BIT 0x00000010U
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/**
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* @}
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*/
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/** @defgroup I2C_XferDirection_definition I2C XferDirection definition
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* @{
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*/
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#define I2C_DIRECTION_RECEIVE 0x00000000U
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#define I2C_DIRECTION_TRANSMIT 0x00000001U
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/**
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* @}
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*/
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/** @defgroup I2C_XferOptions_definition I2C XferOptions definition
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* @{
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*/
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#define I2C_FIRST_FRAME 0x00000001U
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#define I2C_FIRST_AND_NEXT_FRAME 0x00000002U
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#define I2C_NEXT_FRAME 0x00000004U
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#define I2C_FIRST_AND_LAST_FRAME 0x00000008U
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#define I2C_LAST_FRAME_NO_STOP 0x00000010U
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#define I2C_LAST_FRAME 0x00000020U
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/* List of XferOptions in usage of :
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* 1- Restart condition in all use cases (direction change or not)
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*/
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#define I2C_OTHER_FRAME (0x00AA0000U)
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#define I2C_OTHER_AND_LAST_FRAME (0xAA000000U)
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/**
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* @}
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*/
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/** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition
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* @brief I2C Interrupt definition
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* Elements values convention: 0xXXXXXXXX
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* - XXXXXXXX : Interrupt control mask
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* @{
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*/
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#define I2C_IT_BUF I2C_CR2_ITBUFEN
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#define I2C_IT_EVT I2C_CR2_ITEVTEN
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#define I2C_IT_ERR I2C_CR2_ITERREN
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/**
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* @}
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*/
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/** @defgroup I2C_Flag_definition I2C Flag definition
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* @{
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*/
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#define I2C_FLAG_OVR 0x00010800U
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#define I2C_FLAG_AF 0x00010400U
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#define I2C_FLAG_ARLO 0x00010200U
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#define I2C_FLAG_BERR 0x00010100U
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#define I2C_FLAG_TXE 0x00010080U
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#define I2C_FLAG_RXNE 0x00010040U
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#define I2C_FLAG_STOPF 0x00010010U
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#define I2C_FLAG_ADD10 0x00010008U
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#define I2C_FLAG_BTF 0x00010004U
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#define I2C_FLAG_ADDR 0x00010002U
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#define I2C_FLAG_SB 0x00010001U
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#define I2C_FLAG_DUALF 0x00100080U
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#define I2C_FLAG_GENCALL 0x00100010U
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#define I2C_FLAG_TRA 0x00100004U
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#define I2C_FLAG_BUSY 0x00100002U
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#define I2C_FLAG_MSL 0x00100001U
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported macros -----------------------------------------------------------*/
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/** @defgroup I2C_Exported_Macros I2C Exported Macros
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* @{
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*/
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/** @brief Reset I2C handle state.
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* @param __HANDLE__ specifies the I2C Handle.
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* @retval None
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*/
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#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
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#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) do{ \
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(__HANDLE__)->State = HAL_I2C_STATE_RESET; \
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(__HANDLE__)->MspInitCallback = NULL; \
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(__HANDLE__)->MspDeInitCallback = NULL; \
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} while(0)
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#else
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#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
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#endif
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/** @brief Enable or disable the specified I2C interrupts.
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* @param __HANDLE__ specifies the I2C Handle.
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* @param __INTERRUPT__ specifies the interrupt source to enable or disable.
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* This parameter can be one of the following values:
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* @arg I2C_IT_BUF: Buffer interrupt enable
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* @arg I2C_IT_EVT: Event interrupt enable
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* @arg I2C_IT_ERR: Error interrupt enable
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* @retval None
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*/
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#define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__))
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#define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))
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/** @brief Checks if the specified I2C interrupt source is enabled or disabled.
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* @param __HANDLE__ specifies the I2C Handle.
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* @param __INTERRUPT__ specifies the I2C interrupt source to check.
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* This parameter can be one of the following values:
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* @arg I2C_IT_BUF: Buffer interrupt enable
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* @arg I2C_IT_EVT: Event interrupt enable
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* @arg I2C_IT_ERR: Error interrupt enable
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* @retval The new state of __INTERRUPT__ (TRUE or FALSE).
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*/
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#define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
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/** @brief Checks whether the specified I2C flag is set or not.
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* @param __HANDLE__ specifies the I2C Handle.
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* @param __FLAG__ specifies the flag to check.
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* This parameter can be one of the following values:
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* @arg I2C_FLAG_OVR: Overrun/Underrun flag
|
|
* @arg I2C_FLAG_AF: Acknowledge failure flag
|
|
* @arg I2C_FLAG_ARLO: Arbitration lost flag
|
|
* @arg I2C_FLAG_BERR: Bus error flag
|
|
* @arg I2C_FLAG_TXE: Data register empty flag
|
|
* @arg I2C_FLAG_RXNE: Data register not empty flag
|
|
* @arg I2C_FLAG_STOPF: Stop detection flag
|
|
* @arg I2C_FLAG_ADD10: 10-bit header sent flag
|
|
* @arg I2C_FLAG_BTF: Byte transfer finished flag
|
|
* @arg I2C_FLAG_ADDR: Address sent flag
|
|
* Address matched flag
|
|
* @arg I2C_FLAG_SB: Start bit flag
|
|
* @arg I2C_FLAG_DUALF: Dual flag
|
|
* @arg I2C_FLAG_GENCALL: General call header flag
|
|
* @arg I2C_FLAG_TRA: Transmitter/Receiver flag
|
|
* @arg I2C_FLAG_BUSY: Bus busy flag
|
|
* @arg I2C_FLAG_MSL: Master/Slave flag
|
|
* @retval The new state of __FLAG__ (TRUE or FALSE).
|
|
*/
|
|
#define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 16U)) == 0x01U) ? \
|
|
(((((__HANDLE__)->Instance->SR1) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET) : \
|
|
(((((__HANDLE__)->Instance->SR2) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET))
|
|
|
|
/** @brief Clears the I2C pending flags which are cleared by writing 0 in a specific bit.
|
|
* @param __HANDLE__ specifies the I2C Handle.
|
|
* @param __FLAG__ specifies the flag to clear.
|
|
* This parameter can be any combination of the following values:
|
|
* @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode)
|
|
* @arg I2C_FLAG_AF: Acknowledge failure flag
|
|
* @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode)
|
|
* @arg I2C_FLAG_BERR: Bus error flag
|
|
* @retval None
|
|
*/
|
|
#define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR1 = ~((__FLAG__) & I2C_FLAG_MASK))
|
|
|
|
/** @brief Clears the I2C ADDR pending flag.
|
|
* @param __HANDLE__ specifies the I2C Handle.
|
|
* This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral.
|
|
* @retval None
|
|
*/
|
|
#define __HAL_I2C_CLEAR_ADDRFLAG(__HANDLE__) \
|
|
do{ \
|
|
__IO uint32_t tmpreg = 0x00U; \
|
|
tmpreg = (__HANDLE__)->Instance->SR1; \
|
|
tmpreg = (__HANDLE__)->Instance->SR2; \
|
|
UNUSED(tmpreg); \
|
|
} while(0)
|
|
|
|
/** @brief Clears the I2C STOPF pending flag.
|
|
* @param __HANDLE__ specifies the I2C Handle.
|
|
* @retval None
|
|
*/
|
|
#define __HAL_I2C_CLEAR_STOPFLAG(__HANDLE__) \
|
|
do{ \
|
|
__IO uint32_t tmpreg = 0x00U; \
|
|
tmpreg = (__HANDLE__)->Instance->SR1; \
|
|
SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE); \
|
|
UNUSED(tmpreg); \
|
|
} while(0)
|
|
|
|
/** @brief Enable the specified I2C peripheral.
|
|
* @param __HANDLE__ specifies the I2C Handle.
|
|
* @retval None
|
|
*/
|
|
#define __HAL_I2C_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)
|
|
|
|
/** @brief Disable the specified I2C peripheral.
|
|
* @param __HANDLE__ specifies the I2C Handle.
|
|
* @retval None
|
|
*/
|
|
#define __HAL_I2C_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/* Exported functions --------------------------------------------------------*/
|
|
/** @addtogroup I2C_Exported_Functions
|
|
* @{
|
|
*/
|
|
|
|
/** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
|
|
* @{
|
|
*/
|
|
/* Initialization and de-initialization functions******************************/
|
|
HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c);
|
|
HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c);
|
|
void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);
|
|
void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
|
|
|
|
/* Callbacks Register/UnRegister functions ***********************************/
|
|
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
|
|
HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID, pI2C_CallbackTypeDef pCallback);
|
|
HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID);
|
|
|
|
HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pCallback);
|
|
HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c);
|
|
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions
|
|
* @{
|
|
*/
|
|
/* IO operation functions ****************************************************/
|
|
/******* Blocking mode: Polling */
|
|
HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
|
HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
|
HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
|
HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
|
HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
|
HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
|
HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
|
|
|
|
/******* Non-Blocking mode: Interrupt */
|
|
HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
|
|
HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
|
|
HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
|
|
HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
|
|
HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
|
|
HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
|
|
|
|
HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
|
HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
|
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
|
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
|
HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c);
|
|
HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c);
|
|
HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress);
|
|
|
|
/******* Non-Blocking mode: DMA */
|
|
HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
|
|
HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
|
|
HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
|
|
HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
|
|
HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
|
|
HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
|
|
|
|
HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
|
HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
|
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
|
HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
|
|
* @{
|
|
*/
|
|
/******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
|
|
void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c);
|
|
void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c);
|
|
void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c);
|
|
void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c);
|
|
void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c);
|
|
void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c);
|
|
void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
|
|
void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c);
|
|
void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c);
|
|
void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c);
|
|
void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c);
|
|
void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c);
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
|
|
* @{
|
|
*/
|
|
/* Peripheral State, Mode and Error functions *********************************/
|
|
HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c);
|
|
HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c);
|
|
uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
/* Private types -------------------------------------------------------------*/
|
|
/* Private variables ---------------------------------------------------------*/
|
|
/* Private constants ---------------------------------------------------------*/
|
|
/** @defgroup I2C_Private_Constants I2C Private Constants
|
|
* @{
|
|
*/
|
|
#define I2C_FLAG_MASK 0x0000FFFFU
|
|
#define I2C_MIN_PCLK_FREQ_STANDARD 2000000U /*!< 2 MHz */
|
|
#define I2C_MIN_PCLK_FREQ_FAST 4000000U /*!< 4 MHz */
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/* Private macros ------------------------------------------------------------*/
|
|
/** @defgroup I2C_Private_Macros I2C Private Macros
|
|
* @{
|
|
*/
|
|
|
|
#define I2C_MIN_PCLK_FREQ(__PCLK__, __SPEED__) (((__SPEED__) <= 100000U) ? ((__PCLK__) < I2C_MIN_PCLK_FREQ_STANDARD) : ((__PCLK__) < I2C_MIN_PCLK_FREQ_FAST))
|
|
#define I2C_CCR_CALCULATION(__PCLK__, __SPEED__, __COEFF__) (((((__PCLK__) - 1U)/((__SPEED__) * (__COEFF__))) + 1U) & I2C_CCR_CCR)
|
|
#define I2C_FREQRANGE(__PCLK__) ((__PCLK__)/1000000U)
|
|
#define I2C_RISE_TIME(__FREQRANGE__, __SPEED__) (((__SPEED__) <= 100000U) ? ((__FREQRANGE__) + 1U) : ((((__FREQRANGE__) * 300U) / 1000U) + 1U))
|
|
#define I2C_SPEED_STANDARD(__PCLK__, __SPEED__) ((I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U) < 4U)? 4U:I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U))
|
|
#define I2C_SPEED_FAST(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__DUTYCYCLE__) == I2C_DUTYCYCLE_2)? I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 3U) : (I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 25U) | I2C_DUTYCYCLE_16_9))
|
|
#define I2C_SPEED(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__SPEED__) <= 100000U)? (I2C_SPEED_STANDARD((__PCLK__), (__SPEED__))) : \
|
|
((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__)) & I2C_CCR_CCR) == 0U)? 1U : \
|
|
((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__))) | I2C_CCR_FS))
|
|
|
|
#define I2C_7BIT_ADD_WRITE(__ADDRESS__) ((uint8_t)((__ADDRESS__) & (uint8_t)(~I2C_OAR1_ADD0)))
|
|
#define I2C_7BIT_ADD_READ(__ADDRESS__) ((uint8_t)((__ADDRESS__) | I2C_OAR1_ADD0))
|
|
|
|
#define I2C_10BIT_ADDRESS(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF)))
|
|
#define I2C_10BIT_HEADER_WRITE(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)0x00F0)))
|
|
#define I2C_10BIT_HEADER_READ(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)(0x00F1))))
|
|
|
|
#define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0xFF00)) >> 8)))
|
|
#define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF)))
|
|
|
|
/** @defgroup I2C_IS_RTC_Definitions I2C Private macros to check input parameters
|
|
* @{
|
|
*/
|
|
#define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DUTYCYCLE_2) || \
|
|
((CYCLE) == I2C_DUTYCYCLE_16_9))
|
|
#define IS_I2C_ADDRESSING_MODE(ADDRESS) (((ADDRESS) == I2C_ADDRESSINGMODE_7BIT) || \
|
|
((ADDRESS) == I2C_ADDRESSINGMODE_10BIT))
|
|
#define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \
|
|
((ADDRESS) == I2C_DUALADDRESS_ENABLE))
|
|
#define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \
|
|
((CALL) == I2C_GENERALCALL_ENABLE))
|
|
#define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \
|
|
((STRETCH) == I2C_NOSTRETCH_ENABLE))
|
|
#define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
|
|
((SIZE) == I2C_MEMADD_SIZE_16BIT))
|
|
#define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) > 0U) && ((SPEED) <= 400000U))
|
|
#define IS_I2C_OWN_ADDRESS1(ADDRESS1) (((ADDRESS1) & 0xFFFFFC00U) == 0U)
|
|
#define IS_I2C_OWN_ADDRESS2(ADDRESS2) (((ADDRESS2) & 0xFFFFFF01U) == 0U)
|
|
#define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \
|
|
((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \
|
|
((REQUEST) == I2C_NEXT_FRAME) || \
|
|
((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \
|
|
((REQUEST) == I2C_LAST_FRAME) || \
|
|
((REQUEST) == I2C_LAST_FRAME_NO_STOP) || \
|
|
IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST))
|
|
|
|
#define IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_OTHER_FRAME) || \
|
|
((REQUEST) == I2C_OTHER_AND_LAST_FRAME))
|
|
|
|
#define I2C_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET)
|
|
#define I2C_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET)
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/* Private functions ---------------------------------------------------------*/
|
|
/** @defgroup I2C_Private_Functions I2C Private Functions
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
|
|
#endif /* __STM32F1xx_HAL_I2C_H */
|
|
|
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|