1188 lines
38 KiB
C
1188 lines
38 KiB
C
/**
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******************************************************************************
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* @file stm32f0xx_hal_dac_ex.c
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* @author MCD Application Team
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* @brief DAC HAL module driver.
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* This file provides firmware functions to manage the extended
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* functionalities of the DAC peripheral.
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*
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*
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@verbatim
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==============================================================================
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##### How to use this driver #####
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==============================================================================
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[..]
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(+) When Dual mode is enabled (i.e. DAC Channel1 and Channel2 are used simultaneously) :
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Use HAL_DACEx_DualGetValue() to get digital data to be converted and use
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HAL_DACEx_DualSetValue() to set digital value to converted simultaneously in Channel 1 and Channel 2.
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(+) Use HAL_DACEx_TriangleWaveGenerate() to generate Triangle signal.
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(+) Use HAL_DACEx_NoiseWaveGenerate() to generate Noise signal.
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@endverbatim
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f0xx_hal.h"
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/** @addtogroup STM32F0xx_HAL_Driver
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* @{
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*/
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#ifdef HAL_DAC_MODULE_ENABLED
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/** @addtogroup DAC
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* @{
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*/
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#if defined(STM32F051x8) || defined(STM32F058xx) || \
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defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
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defined(STM32F091xC) || defined(STM32F098xx)
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/** @addtogroup DAC_Private_Functions
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* @{
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*/
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static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma);
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static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma);
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static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma);
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/**
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* @}
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*/
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#endif /* STM32F051x8 STM32F058xx */
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/* STM32F071xB STM32F072xB STM32F078xx */
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/* STM32F091xC STM32F098xx */
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#if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
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defined(STM32F091xC) || defined(STM32F098xx)
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/** @addtogroup DAC_Private_Functions
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* @{
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*/
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/* DAC_DMAConvCpltCh2 / DAC_DMAErrorCh2 / DAC_DMAHalfConvCpltCh2 */
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/* are set by HAL_DAC_Start_DMA */
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void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma);
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void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma);
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void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma);
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/**
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* @}
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*/
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#endif /* STM32F071xB STM32F072xB STM32F078xx */
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/* STM32F091xC STM32F098xx */
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/** @addtogroup DAC_Exported_Functions
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* @{
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*/
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/** @addtogroup DAC_Exported_Functions_Group3
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* @{
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*/
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#if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
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defined(STM32F091xC) || defined(STM32F098xx)
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/**
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* @brief Configures the selected DAC channel.
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* @param hdac pointer to a DAC_HandleTypeDef structure that contains
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* the configuration information for the specified DAC.
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* @param sConfig DAC configuration structure.
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* @param Channel The selected DAC channel.
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* This parameter can be one of the following values:
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* @arg DAC_CHANNEL_1: DAC Channel1 selected
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* @arg DAC_CHANNEL_2: DAC Channel2 selected
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel)
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{
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uint32_t tmpreg1 = 0U, tmpreg2 = 0U;
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/* Check the DAC parameters */
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assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
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assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
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assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
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assert_param(IS_DAC_CHANNEL(Channel));
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/* Process locked */
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__HAL_LOCK(hdac);
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/* Change DAC state */
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hdac->State = HAL_DAC_STATE_BUSY;
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/* Get the DAC CR value */
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tmpreg1 = hdac->Instance->CR;
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/* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */
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tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) << Channel);
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/* Configure for the selected DAC channel: buffer output, trigger */
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/* Set TSELx and TENx bits according to DAC_Trigger value */
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/* Set BOFFx bit according to DAC_OutputBuffer value */
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tmpreg2 = (sConfig->DAC_Trigger | sConfig->DAC_OutputBuffer);
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/* Calculate CR register value depending on DAC_Channel */
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tmpreg1 |= tmpreg2 << Channel;
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/* Write to DAC CR */
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hdac->Instance->CR = tmpreg1;
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/* Change DAC state */
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hdac->State = HAL_DAC_STATE_READY;
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/* Process unlocked */
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__HAL_UNLOCK(hdac);
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/* Return function status */
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return HAL_OK;
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}
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#endif /* STM32F071xB STM32F072xB STM32F078xx */
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/* STM32F091xC STM32F098xx */
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#if defined (STM32F051x8) || defined (STM32F058xx)
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/**
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* @brief Configures the selected DAC channel.
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* @param hdac pointer to a DAC_HandleTypeDef structure that contains
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* the configuration information for the specified DAC.
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* @param sConfig DAC configuration structure.
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* @param Channel The selected DAC channel.
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* This parameter can be one of the following values:
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* @arg DAC_CHANNEL_1: DAC Channel1 selected
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel)
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{
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uint32_t tmpreg1 = 0U, tmpreg2 = 0U;
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/* Check the DAC parameters */
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assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
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assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
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assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
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assert_param(IS_DAC_CHANNEL(Channel));
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/* Process locked */
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__HAL_LOCK(hdac);
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/* Change DAC state */
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hdac->State = HAL_DAC_STATE_BUSY;
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/* Get the DAC CR value */
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tmpreg1 = hdac->Instance->CR;
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/* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */
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tmpreg1 &= ~(((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) << Channel);
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/* Configure for the selected DAC channel: buffer output, trigger */
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/* Set TSELx and TENx bits according to DAC_Trigger value */
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/* Set BOFFx bit according to DAC_OutputBuffer value */
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tmpreg2 = (sConfig->DAC_Trigger | sConfig->DAC_OutputBuffer);
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/* Calculate CR register value depending on DAC_Channel */
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tmpreg1 |= tmpreg2 << Channel;
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/* Write to DAC CR */
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hdac->Instance->CR = tmpreg1;
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/* Change DAC state */
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hdac->State = HAL_DAC_STATE_READY;
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/* Process unlocked */
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__HAL_UNLOCK(hdac);
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/* Return function status */
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return HAL_OK;
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}
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#endif /* STM32F051x8 STM32F058xx */
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#if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
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defined(STM32F091xC) || defined(STM32F098xx)
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/* DAC 1 has 2 channels 1 & 2 */
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/**
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* @brief Returns the last data output value of the selected DAC channel.
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* @param hdac pointer to a DAC_HandleTypeDef structure that contains
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* the configuration information for the specified DAC.
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* @param Channel The selected DAC channel.
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* This parameter can be one of the following values:
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* @arg DAC_CHANNEL_1: DAC Channel1 selected
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* @arg DAC_CHANNEL_2: DAC Channel2 selected
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* @retval The selected DAC channel data output value.
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*/
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uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel)
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{
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/* Check the parameters */
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assert_param(IS_DAC_CHANNEL(Channel));
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/* Returns the DAC channel data output register value */
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if(Channel == DAC_CHANNEL_1)
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{
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return hdac->Instance->DOR1;
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}
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else
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{
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return hdac->Instance->DOR2;
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}
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}
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#endif /* STM32F071xB STM32F072xB STM32F078xx */
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/* STM32F091xC STM32F098xx */
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#if defined (STM32F051x8) || defined (STM32F058xx)
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/* DAC 1 has 1 channels */
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/**
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* @brief Returns the last data output value of the selected DAC channel.
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* @param hdac pointer to a DAC_HandleTypeDef structure that contains
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* the configuration information for the specified DAC.
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* @param Channel The selected DAC channel.
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* This parameter can be one of the following values:
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* @arg DAC_CHANNEL_1: DAC Channel1 selected
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* @retval The selected DAC channel data output value.
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*/
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uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel)
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{
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/* Check the parameters */
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assert_param(IS_DAC_CHANNEL(Channel));
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/* Returns the DAC channel data output register value */
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return hdac->Instance->DOR1;
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}
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#endif /* STM32F051x8 STM32F058xx */
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/**
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* @}
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*/
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/** @addtogroup DAC_Exported_Functions_Group2
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* @{
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*/
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#if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
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defined(STM32F091xC) || defined(STM32F098xx)
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/**
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* @brief Enables DAC and starts conversion of channel.
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* @param hdac pointer to a DAC_HandleTypeDef structure that contains
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* the configuration information for the specified DAC.
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* @param Channel The selected DAC channel.
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* This parameter can be one of the following values:
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* @arg DAC_CHANNEL_1: DAC Channel1 selected
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* @arg DAC_CHANNEL_2: DAC Channel2 selected
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel)
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{
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/* Check the parameters */
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assert_param(IS_DAC_CHANNEL(Channel));
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/* Process locked */
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__HAL_LOCK(hdac);
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/* Change DAC state */
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hdac->State = HAL_DAC_STATE_BUSY;
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/* Enable the Peripharal */
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__HAL_DAC_ENABLE(hdac, Channel);
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if(Channel == DAC_CHANNEL_1)
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{
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/* Check if software trigger enabled */
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if((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == (DAC_CR_TEN1 | DAC_CR_TSEL1))
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{
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/* Enable the selected DAC software conversion */
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SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
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}
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}
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else
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{
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/* Check if software trigger enabled */
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if((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_CR_TEN2 | DAC_CR_TSEL2))
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{
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/* Enable the selected DAC software conversion*/
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SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2);
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}
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}
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/* Change DAC state */
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hdac->State = HAL_DAC_STATE_READY;
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/* Process unlocked */
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__HAL_UNLOCK(hdac);
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/* Return function status */
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return HAL_OK;
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}
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/**
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* @brief Enables DAC and starts conversion of channel.
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* @param hdac pointer to a DAC_HandleTypeDef structure that contains
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* the configuration information for the specified DAC.
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* @param Channel The selected DAC channel.
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* This parameter can be one of the following values:
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* @arg DAC_CHANNEL_1: DAC Channel1 selected
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* @arg DAC_CHANNEL_2: DAC Channel2 selected
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* @param pData The destination peripheral Buffer address.
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* @param Length The length of data to be transferred from memory to DAC peripheral
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* @param Alignment Specifies the data alignment for DAC channel.
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* This parameter can be one of the following values:
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* @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
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* @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
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* @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment)
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{
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uint32_t tmpreg = 0U;
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/* Check the parameters */
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assert_param(IS_DAC_CHANNEL(Channel));
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assert_param(IS_DAC_ALIGN(Alignment));
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/* Process locked */
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__HAL_LOCK(hdac);
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/* Change DAC state */
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hdac->State = HAL_DAC_STATE_BUSY;
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if(Channel == DAC_CHANNEL_1)
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{
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/* Set the DMA transfer complete callback for channel1 */
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hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
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/* Set the DMA half transfer complete callback for channel1 */
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hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
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/* Set the DMA error callback for channel1 */
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hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
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/* Enable the selected DAC channel1 DMA request */
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SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
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/* Case of use of channel 1 */
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switch(Alignment)
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{
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case DAC_ALIGN_12B_R:
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/* Get DHR12R1 address */
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tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
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break;
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case DAC_ALIGN_12B_L:
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/* Get DHR12L1 address */
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tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
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break;
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case DAC_ALIGN_8B_R:
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/* Get DHR8R1 address */
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tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
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break;
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default:
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break;
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}
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}
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else
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{
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/* Set the DMA transfer complete callback for channel2 */
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hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
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/* Set the DMA half transfer complete callback for channel2 */
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hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
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/* Set the DMA error callback for channel2 */
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hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
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/* Enable the selected DAC channel2 DMA request */
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SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
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/* Case of use of channel 2 */
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switch(Alignment)
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{
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case DAC_ALIGN_12B_R:
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/* Get DHR12R2 address */
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tmpreg = (uint32_t)&hdac->Instance->DHR12R2;
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break;
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case DAC_ALIGN_12B_L:
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/* Get DHR12L2 address */
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tmpreg = (uint32_t)&hdac->Instance->DHR12L2;
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break;
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case DAC_ALIGN_8B_R:
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/* Get DHR8R2 address */
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tmpreg = (uint32_t)&hdac->Instance->DHR8R2;
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break;
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default:
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break;
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}
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}
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/* Enable the DMA channel */
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if(Channel == DAC_CHANNEL_1)
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{
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/* Enable the DAC DMA underrun interrupt */
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__HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
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/* Enable the DMA channel */
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HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
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}
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else
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{
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/* Enable the DAC DMA underrun interrupt */
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__HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2);
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/* Enable the DMA channel */
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HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
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}
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/* Enable the Peripharal */
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__HAL_DAC_ENABLE(hdac, Channel);
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/* Process Unlocked */
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__HAL_UNLOCK(hdac);
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/* Return function status */
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return HAL_OK;
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}
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#endif /* STM32F071xB STM32F072xB STM32F078xx */
|
|
/* STM32F091xC STM32F098xx */
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|
|
|
#if defined (STM32F051x8) || defined (STM32F058xx)
|
|
|
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HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel)
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{
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/* Check the parameters */
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assert_param(IS_DAC_CHANNEL(Channel));
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|
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/* Process locked */
|
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__HAL_LOCK(hdac);
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/* Change DAC state */
|
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hdac->State = HAL_DAC_STATE_BUSY;
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|
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/* Enable the Peripharal */
|
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__HAL_DAC_ENABLE(hdac, Channel);
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if(Channel == DAC_CHANNEL_1)
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{
|
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/* Check if software trigger enabled */
|
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if((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == (DAC_CR_TEN1 | DAC_CR_TSEL1))
|
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{
|
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/* Enable the selected DAC software conversion */
|
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SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
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}
|
|
}
|
|
|
|
/* Change DAC state */
|
|
hdac->State = HAL_DAC_STATE_READY;
|
|
|
|
/* Process unlocked */
|
|
__HAL_UNLOCK(hdac);
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Enables DAC and starts conversion of channel.
|
|
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
|
|
* the configuration information for the specified DAC.
|
|
* @param Channel The selected DAC channel.
|
|
* This parameter can be one of the following values:
|
|
* @arg DAC_CHANNEL_1: DAC Channel1 selected
|
|
* @param pData The destination peripheral Buffer address.
|
|
* @param Length The length of data to be transferred from memory to DAC peripheral
|
|
* @param Alignment Specifies the data alignment for DAC channel.
|
|
* This parameter can be one of the following values:
|
|
* @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
|
|
* @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
|
|
* @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment)
|
|
{
|
|
uint32_t tmpreg = 0U;
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_DAC_CHANNEL(Channel));
|
|
assert_param(IS_DAC_ALIGN(Alignment));
|
|
|
|
/* Process locked */
|
|
__HAL_LOCK(hdac);
|
|
|
|
/* Change DAC state */
|
|
hdac->State = HAL_DAC_STATE_BUSY;
|
|
|
|
/* Set the DMA transfer complete callback for channel1 */
|
|
hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
|
|
|
|
/* Set the DMA half transfer complete callback for channel1 */
|
|
hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
|
|
|
|
/* Set the DMA error callback for channel1 */
|
|
hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
|
|
|
|
/* Enable the selected DAC channel1 DMA request */
|
|
SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
|
|
|
|
/* Case of use of channel 1 */
|
|
switch(Alignment)
|
|
{
|
|
case DAC_ALIGN_12B_R:
|
|
/* Get DHR12R1 address */
|
|
tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
|
|
break;
|
|
case DAC_ALIGN_12B_L:
|
|
/* Get DHR12L1 address */
|
|
tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
|
|
break;
|
|
case DAC_ALIGN_8B_R:
|
|
/* Get DHR8R1 address */
|
|
tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
|
|
/* Enable the DMA channel */
|
|
/* Enable the DAC DMA underrun interrupt */
|
|
__HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
|
|
|
|
/* Enable the DMA channel */
|
|
HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
|
|
|
|
/* Enable the DAC DMA underrun interrupt */
|
|
__HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
|
|
|
|
/* Enable the DMA channel */
|
|
HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
|
|
|
|
/* Enable the Peripharal */
|
|
__HAL_DAC_ENABLE(hdac, Channel);
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hdac);
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
}
|
|
|
|
#endif /* STM32F051x8 STM32F058xx */
|
|
|
|
#if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
|
|
defined(STM32F091xC) || defined(STM32F098xx)
|
|
/* DAC channel 2 is available on top of DAC channel 1 */
|
|
|
|
/**
|
|
* @brief Handles DAC interrupt request
|
|
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
|
|
* the configuration information for the specified DAC.
|
|
* @retval None
|
|
*/
|
|
void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac)
|
|
{
|
|
if(__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR1))
|
|
{
|
|
/* Check underrun channel 1 flag */
|
|
if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
|
|
{
|
|
/* Change DAC state to error state */
|
|
hdac->State = HAL_DAC_STATE_ERROR;
|
|
|
|
/* Set DAC error code to channel1 DMA underrun error */
|
|
hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH1;
|
|
|
|
/* Clear the underrun flag */
|
|
__HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1);
|
|
|
|
/* Disable the selected DAC channel1 DMA request */
|
|
hdac->Instance->CR &= ~DAC_CR_DMAEN1;
|
|
|
|
/* Error callback */
|
|
HAL_DAC_DMAUnderrunCallbackCh1(hdac);
|
|
}
|
|
}
|
|
if(__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR2))
|
|
{
|
|
/* Check underrun channel 2 flag */
|
|
if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2))
|
|
{
|
|
/* Change DAC state to error state */
|
|
hdac->State = HAL_DAC_STATE_ERROR;
|
|
|
|
/* Set DAC error code to channel2 DMA underrun error */
|
|
hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH2;
|
|
|
|
/* Clear the underrun flag */
|
|
__HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR2);
|
|
|
|
/* Disable the selected DAC channel1 DMA request */
|
|
hdac->Instance->CR &= ~DAC_CR_DMAEN2;
|
|
|
|
/* Error callback */
|
|
HAL_DACEx_DMAUnderrunCallbackCh2(hdac);
|
|
}
|
|
}
|
|
}
|
|
|
|
#endif /* STM32F071xB STM32F072xB STM32F078xx */
|
|
/* STM32F091xC STM32F098xx */
|
|
|
|
#if defined (STM32F051x8) || defined (STM32F058xx)
|
|
/* DAC channel 2 is NOT available. Only DAC channel 1 is available */
|
|
|
|
/**
|
|
* @brief Handles DAC interrupt request
|
|
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
|
|
* the configuration information for the specified DAC.
|
|
* @retval None
|
|
*/
|
|
void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac)
|
|
{
|
|
if(__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR1))
|
|
{
|
|
/* Check Overrun flag */
|
|
if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
|
|
{
|
|
/* Change DAC state to error state */
|
|
hdac->State = HAL_DAC_STATE_ERROR;
|
|
|
|
/* Set DAC error code to chanel1 DMA underrun error */
|
|
hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH1;
|
|
|
|
/* Clear the underrun flag */
|
|
__HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1);
|
|
|
|
/* Disable the selected DAC channel1 DMA request */
|
|
hdac->Instance->CR &= ~DAC_CR_DMAEN1;
|
|
|
|
/* Error callback */
|
|
HAL_DAC_DMAUnderrunCallbackCh1(hdac);
|
|
}
|
|
}
|
|
}
|
|
|
|
#endif /* STM32F051x8 STM32F058xx */
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
#if defined(STM32F051x8) || defined(STM32F058xx) || \
|
|
defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
|
|
defined(STM32F091xC) || defined(STM32F098xx)
|
|
|
|
/** @addtogroup DAC_Private_Functions
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @brief DMA conversion complete callback.
|
|
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
|
|
* the configuration information for the specified DMA module.
|
|
* @retval None
|
|
*/
|
|
static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma)
|
|
{
|
|
DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
|
|
|
|
HAL_DAC_ConvCpltCallbackCh1(hdac);
|
|
|
|
hdac->State= HAL_DAC_STATE_READY;
|
|
}
|
|
|
|
/**
|
|
* @brief DMA half transfer complete callback.
|
|
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
|
|
* the configuration information for the specified DMA module.
|
|
* @retval None
|
|
*/
|
|
static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma)
|
|
{
|
|
DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
|
|
/* Conversion complete callback */
|
|
HAL_DAC_ConvHalfCpltCallbackCh1(hdac);
|
|
}
|
|
|
|
/**
|
|
* @brief DMA error callback
|
|
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
|
|
* the configuration information for the specified DMA module.
|
|
* @retval None
|
|
*/
|
|
static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma)
|
|
{
|
|
DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
|
|
|
|
/* Set DAC error code to DMA error */
|
|
hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
|
|
|
|
HAL_DAC_ErrorCallbackCh1(hdac);
|
|
|
|
hdac->State= HAL_DAC_STATE_READY;
|
|
}
|
|
/**
|
|
* @}
|
|
*/
|
|
#endif /* STM32F051x8 STM32F058xx */
|
|
/* STM32F071xB STM32F072xB STM32F078xx */
|
|
/* STM32F091xC STM32F098xx */
|
|
|
|
#if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
|
|
defined(STM32F091xC) || defined(STM32F098xx)
|
|
|
|
/** @addtogroup DAC_Private_Functions
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @brief DMA conversion complete callback.
|
|
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
|
|
* the configuration information for the specified DMA module.
|
|
* @retval None
|
|
*/
|
|
void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma)
|
|
{
|
|
DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
|
|
|
|
HAL_DACEx_ConvCpltCallbackCh2(hdac);
|
|
|
|
hdac->State= HAL_DAC_STATE_READY;
|
|
}
|
|
|
|
/**
|
|
* @brief DMA half transfer complete callback.
|
|
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
|
|
* the configuration information for the specified DMA module.
|
|
* @retval None
|
|
*/
|
|
void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma)
|
|
{
|
|
DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
|
|
/* Conversion complete callback */
|
|
HAL_DACEx_ConvHalfCpltCallbackCh2(hdac);
|
|
}
|
|
|
|
/**
|
|
* @brief DMA error callback
|
|
* @param hdma pointer to a DMA_HandleTypeDef structure that contains
|
|
* the configuration information for the specified DMA module.
|
|
* @retval None
|
|
*/
|
|
void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma)
|
|
{
|
|
DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
|
|
|
|
/* Set DAC error code to DMA error */
|
|
hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
|
|
|
|
HAL_DACEx_ErrorCallbackCh2(hdac);
|
|
|
|
hdac->State= HAL_DAC_STATE_READY;
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
#endif /* STM32F071xB STM32F072xB STM32F078xx */
|
|
/* STM32F091xC STM32F098xx */
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @defgroup DACEx DACEx
|
|
* @brief DACEx driver module
|
|
* @{
|
|
*/
|
|
|
|
/* Private typedef -----------------------------------------------------------*/
|
|
/* Private define ------------------------------------------------------------*/
|
|
/* Private macro -------------------------------------------------------------*/
|
|
/** @defgroup DACEx_Private_Macros DACEx Private Macros
|
|
* @{
|
|
*/
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/* Private variables ---------------------------------------------------------*/
|
|
/* Private function prototypes -----------------------------------------------*/
|
|
/* Private functions ---------------------------------------------------------*/
|
|
|
|
/** @defgroup DACEx_Exported_Functions DACEx Exported Functions
|
|
* @{
|
|
*/
|
|
|
|
/** @defgroup DACEx_Exported_Functions_Group1 Extended features functions
|
|
* @brief Extended features functions
|
|
*
|
|
@verbatim
|
|
==============================================================================
|
|
##### Extended features functions #####
|
|
==============================================================================
|
|
[..] This section provides functions allowing to:
|
|
(+) Start conversion.
|
|
(+) Stop conversion.
|
|
(+) Start conversion and enable DMA transfer.
|
|
(+) Stop conversion and disable DMA transfer.
|
|
(+) Get result of conversion.
|
|
(+) Get result of dual mode conversion.
|
|
|
|
@endverbatim
|
|
* @{
|
|
*/
|
|
|
|
#if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
|
|
defined(STM32F091xC) || defined(STM32F098xx)
|
|
|
|
/**
|
|
* @brief Returns the last data output value of the selected DAC channel.
|
|
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
|
|
* the configuration information for the specified DAC.
|
|
* @retval The selected DAC channel data output value.
|
|
*/
|
|
uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef* hdac)
|
|
{
|
|
uint32_t tmp = 0U;
|
|
|
|
tmp |= hdac->Instance->DOR1;
|
|
|
|
/* DAC channel 2 is present in DAC 1 */
|
|
tmp |= hdac->Instance->DOR2 << 16U;
|
|
|
|
/* Returns the DAC channel data output register value */
|
|
return tmp;
|
|
}
|
|
|
|
#endif /* STM32F071xB STM32F072xB STM32F078xx */
|
|
/* STM32F091xC STM32F098xx */
|
|
|
|
#if defined (STM32F051x8) || defined (STM32F058xx)
|
|
|
|
/**
|
|
* @brief Returns the last data output value of the selected DAC channel.
|
|
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
|
|
* the configuration information for the specified DAC.
|
|
* @retval The selected DAC channel data output value.
|
|
*/
|
|
uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef* hdac)
|
|
{
|
|
uint32_t tmp = 0U;
|
|
|
|
tmp |= hdac->Instance->DOR1;
|
|
|
|
/* Returns the DAC channel data output register value */
|
|
return tmp;
|
|
}
|
|
|
|
#endif /* STM32F051x8 STM32F058xx */
|
|
|
|
#if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
|
|
defined(STM32F091xC) || defined(STM32F098xx)
|
|
|
|
/**
|
|
* @brief Enables or disables the selected DAC channel wave generation.
|
|
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
|
|
* the configuration information for the specified DAC.
|
|
* @param Channel The selected DAC channel.
|
|
* This parameter can be one of the following values:
|
|
* DAC_CHANNEL_1 / DAC_CHANNEL_2
|
|
* @param Amplitude Select max triangle amplitude.
|
|
* This parameter can be one of the following values:
|
|
* @arg DAC_TRIANGLEAMPLITUDE_1: Select max triangle amplitude of 1
|
|
* @arg DAC_TRIANGLEAMPLITUDE_3: Select max triangle amplitude of 3
|
|
* @arg DAC_TRIANGLEAMPLITUDE_7: Select max triangle amplitude of 7
|
|
* @arg DAC_TRIANGLEAMPLITUDE_15: Select max triangle amplitude of 15
|
|
* @arg DAC_TRIANGLEAMPLITUDE_31: Select max triangle amplitude of 31
|
|
* @arg DAC_TRIANGLEAMPLITUDE_63: Select max triangle amplitude of 63
|
|
* @arg DAC_TRIANGLEAMPLITUDE_127: Select max triangle amplitude of 127
|
|
* @arg DAC_TRIANGLEAMPLITUDE_255: Select max triangle amplitude of 255
|
|
* @arg DAC_TRIANGLEAMPLITUDE_511: Select max triangle amplitude of 511
|
|
* @arg DAC_TRIANGLEAMPLITUDE_1023: Select max triangle amplitude of 1023
|
|
* @arg DAC_TRIANGLEAMPLITUDE_2047: Select max triangle amplitude of 2047
|
|
* @arg DAC_TRIANGLEAMPLITUDE_4095: Select max triangle amplitude of 4095
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude)
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_DAC_CHANNEL(Channel));
|
|
assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
|
|
|
|
/* Process locked */
|
|
__HAL_LOCK(hdac);
|
|
|
|
/* Change DAC state */
|
|
hdac->State = HAL_DAC_STATE_BUSY;
|
|
|
|
/* Enable the selected wave generation for the selected DAC channel */
|
|
MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_CR_WAVE1_1 | Amplitude) << Channel);
|
|
|
|
/* Change DAC state */
|
|
hdac->State = HAL_DAC_STATE_READY;
|
|
|
|
/* Process unlocked */
|
|
__HAL_UNLOCK(hdac);
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Enables or disables the selected DAC channel wave generation.
|
|
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
|
|
* the configuration information for the specified DAC.
|
|
* @param Channel The selected DAC channel.
|
|
* This parameter can be one of the following values:
|
|
* DAC_CHANNEL_1 / DAC_CHANNEL_2
|
|
* @param Amplitude Unmask DAC channel LFSR for noise wave generation.
|
|
* This parameter can be one of the following values:
|
|
* @arg DAC_LFSRUNMASK_BIT0: Unmask DAC channel LFSR bit0 for noise wave generation
|
|
* @arg DAC_LFSRUNMASK_BITS1_0: Unmask DAC channel LFSR bit[1:0] for noise wave generation
|
|
* @arg DAC_LFSRUNMASK_BITS2_0: Unmask DAC channel LFSR bit[2:0] for noise wave generation
|
|
* @arg DAC_LFSRUNMASK_BITS3_0: Unmask DAC channel LFSR bit[3:0] for noise wave generation
|
|
* @arg DAC_LFSRUNMASK_BITS4_0: Unmask DAC channel LFSR bit[4:0] for noise wave generation
|
|
* @arg DAC_LFSRUNMASK_BITS5_0: Unmask DAC channel LFSR bit[5:0] for noise wave generation
|
|
* @arg DAC_LFSRUNMASK_BITS6_0: Unmask DAC channel LFSR bit[6:0] for noise wave generation
|
|
* @arg DAC_LFSRUNMASK_BITS7_0: Unmask DAC channel LFSR bit[7:0] for noise wave generation
|
|
* @arg DAC_LFSRUNMASK_BITS8_0: Unmask DAC channel LFSR bit[8:0] for noise wave generation
|
|
* @arg DAC_LFSRUNMASK_BITS9_0: Unmask DAC channel LFSR bit[9:0] for noise wave generation
|
|
* @arg DAC_LFSRUNMASK_BITS10_0: Unmask DAC channel LFSR bit[10:0] for noise wave generation
|
|
* @arg DAC_LFSRUNMASK_BITS11_0: Unmask DAC channel LFSR bit[11:0] for noise wave generation
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude)
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_DAC_CHANNEL(Channel));
|
|
assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
|
|
|
|
/* Process locked */
|
|
__HAL_LOCK(hdac);
|
|
|
|
/* Change DAC state */
|
|
hdac->State = HAL_DAC_STATE_BUSY;
|
|
|
|
/* Enable the selected wave generation for the selected DAC channel */
|
|
MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_CR_WAVE1_0 | Amplitude) << Channel);
|
|
|
|
/* Change DAC state */
|
|
hdac->State = HAL_DAC_STATE_READY;
|
|
|
|
/* Process unlocked */
|
|
__HAL_UNLOCK(hdac);
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
}
|
|
|
|
#endif /* STM32F071xB STM32F072xB STM32F078xx */
|
|
/* STM32F091xC STM32F098xx */
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
#if defined(STM32F051x8) || defined(STM32F058xx) || \
|
|
defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
|
|
defined(STM32F091xC) || defined(STM32F098xx)
|
|
|
|
/** @addtogroup DACEx_Exported_Functions
|
|
* @{
|
|
*/
|
|
|
|
/** @addtogroup DACEx_Exported_Functions_Group1
|
|
* @brief Extended features functions
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @brief Set the specified data holding register value for dual DAC channel.
|
|
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
|
|
* the configuration information for the specified DAC.
|
|
* @param Alignment Specifies the data alignment for dual channel DAC.
|
|
* This parameter can be one of the following values:
|
|
* DAC_ALIGN_8B_R: 8bit right data alignment selected
|
|
* DAC_ALIGN_12B_L: 12bit left data alignment selected
|
|
* DAC_ALIGN_12B_R: 12bit right data alignment selected
|
|
* @param Data1 Data for DAC Channel2 to be loaded in the selected data holding register.
|
|
* @param Data2 Data for DAC Channel1 to be loaded in the selected data holding register.
|
|
* @note In dual mode, a unique register access is required to write in both
|
|
* DAC channels at the same time.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef* hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2)
|
|
{
|
|
uint32_t data = 0U, tmp = 0U;
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_DAC_ALIGN(Alignment));
|
|
assert_param(IS_DAC_DATA(Data1));
|
|
assert_param(IS_DAC_DATA(Data2));
|
|
|
|
/* Calculate and set dual DAC data holding register value */
|
|
if (Alignment == DAC_ALIGN_8B_R)
|
|
{
|
|
data = ((uint32_t)Data2 << 8U) | Data1;
|
|
}
|
|
else
|
|
{
|
|
data = ((uint32_t)Data2 << 16U) | Data1;
|
|
}
|
|
|
|
tmp = (uint32_t)hdac->Instance;
|
|
tmp += DAC_DHR12RD_ALIGNMENT(Alignment);
|
|
|
|
/* Set the dual DAC selected data holding register */
|
|
*(__IO uint32_t *)tmp = data;
|
|
|
|
/* Return function status */
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
#endif /* STM32F051x8 STM32F058xx */
|
|
/* STM32F071xB STM32F072xB STM32F078xx */
|
|
/* STM32F091xC STM32F098xx */
|
|
|
|
#if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
|
|
defined(STM32F091xC) || defined(STM32F098xx)
|
|
|
|
/** @addtogroup DACEx_Exported_Functions
|
|
* @{
|
|
*/
|
|
|
|
/** @addtogroup DACEx_Exported_Functions_Group1
|
|
* @brief Extended features functions
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @brief Conversion complete callback in non blocking mode for Channel2
|
|
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
|
|
* the configuration information for the specified DAC.
|
|
* @retval None
|
|
*/
|
|
__weak void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef* hdac)
|
|
{
|
|
/* Prevent unused argument(s) compilation warning */
|
|
UNUSED(hdac);
|
|
|
|
/* NOTE : This function Should not be modified, when the callback is needed,
|
|
the HAL_DAC_ConvCpltCallback could be implemented in the user file
|
|
*/
|
|
}
|
|
|
|
/**
|
|
* @brief Conversion half DMA transfer callback in non blocking mode for Channel2
|
|
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
|
|
* the configuration information for the specified DAC.
|
|
* @retval None
|
|
*/
|
|
__weak void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef* hdac)
|
|
{
|
|
/* Prevent unused argument(s) compilation warning */
|
|
UNUSED(hdac);
|
|
|
|
/* NOTE : This function Should not be modified, when the callback is needed,
|
|
the HAL_DAC_ConvHalfCpltCallbackCh2 could be implemented in the user file
|
|
*/
|
|
}
|
|
|
|
/**
|
|
* @brief Error DAC callback for Channel2.
|
|
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
|
|
* the configuration information for the specified DAC.
|
|
* @retval None
|
|
*/
|
|
__weak void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef *hdac)
|
|
{
|
|
/* Prevent unused argument(s) compilation warning */
|
|
UNUSED(hdac);
|
|
|
|
/* NOTE : This function Should not be modified, when the callback is needed,
|
|
the HAL_DAC_ErrorCallback could be implemented in the user file
|
|
*/
|
|
}
|
|
|
|
/**
|
|
* @brief DMA underrun DAC callback for channel2.
|
|
* @param hdac pointer to a DAC_HandleTypeDef structure that contains
|
|
* the configuration information for the specified DAC.
|
|
* @retval None
|
|
*/
|
|
__weak void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac)
|
|
{
|
|
/* Prevent unused argument(s) compilation warning */
|
|
UNUSED(hdac);
|
|
|
|
/* NOTE : This function Should not be modified, when the callback is needed,
|
|
the HAL_DAC_DMAUnderrunCallbackCh2 could be implemented in the user file
|
|
*/
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
#endif /* STM32F071xB STM32F072xB STM32F078xx */
|
|
/* STM32F091xC STM32F098xx */
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
#endif /* HAL_DAC_MODULE_ENABLED */
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|