61 lines
2.9 KiB
C
61 lines
2.9 KiB
C
/**
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* \file
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*
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* \brief Instance description for GPBR
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*
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* Copyright (c) 2019 Microchip Technology Inc.
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*
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* \license_start
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*
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* \page License
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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* \license_stop
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*
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*/
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/* file generated from device description version 2019-01-18T21:19:59Z */
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#ifndef _SAME70_GPBR_INSTANCE_H_
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#define _SAME70_GPBR_INSTANCE_H_
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/* ========== Register definition for GPBR peripheral ========== */
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#if (defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__))
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#define REG_GPBR_SYS_GPBR (0x400E1890) /**< (GPBR) General Purpose Backup Register 0 */
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#define REG_GPBR_SYS_GPBR0 (0x400E1890) /**< (GPBR) General Purpose Backup Register 0 */
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#define REG_GPBR_SYS_GPBR1 (0x400E1894) /**< (GPBR) General Purpose Backup Register 1 */
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#define REG_GPBR_SYS_GPBR2 (0x400E1898) /**< (GPBR) General Purpose Backup Register 2 */
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#define REG_GPBR_SYS_GPBR3 (0x400E189C) /**< (GPBR) General Purpose Backup Register 3 */
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#define REG_GPBR_SYS_GPBR4 (0x400E18A0) /**< (GPBR) General Purpose Backup Register 4 */
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#define REG_GPBR_SYS_GPBR5 (0x400E18A4) /**< (GPBR) General Purpose Backup Register 5 */
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#define REG_GPBR_SYS_GPBR6 (0x400E18A8) /**< (GPBR) General Purpose Backup Register 6 */
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#define REG_GPBR_SYS_GPBR7 (0x400E18AC) /**< (GPBR) General Purpose Backup Register 7 */
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#else
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#define REG_GPBR_SYS_GPBR (*(__IO uint32_t*)0x400E1890U) /**< (GPBR) General Purpose Backup Register 0 */
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#define REG_GPBR_SYS_GPBR0 (*(__IO uint32_t*)0x400E1890U) /**< (GPBR) General Purpose Backup Register 0 */
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#define REG_GPBR_SYS_GPBR1 (*(__IO uint32_t*)0x400E1894U) /**< (GPBR) General Purpose Backup Register 1 */
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#define REG_GPBR_SYS_GPBR2 (*(__IO uint32_t*)0x400E1898U) /**< (GPBR) General Purpose Backup Register 2 */
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#define REG_GPBR_SYS_GPBR3 (*(__IO uint32_t*)0x400E189CU) /**< (GPBR) General Purpose Backup Register 3 */
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#define REG_GPBR_SYS_GPBR4 (*(__IO uint32_t*)0x400E18A0U) /**< (GPBR) General Purpose Backup Register 4 */
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#define REG_GPBR_SYS_GPBR5 (*(__IO uint32_t*)0x400E18A4U) /**< (GPBR) General Purpose Backup Register 5 */
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#define REG_GPBR_SYS_GPBR6 (*(__IO uint32_t*)0x400E18A8U) /**< (GPBR) General Purpose Backup Register 6 */
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#define REG_GPBR_SYS_GPBR7 (*(__IO uint32_t*)0x400E18ACU) /**< (GPBR) General Purpose Backup Register 7 */
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#endif /* (defined(__ASSEMBLER__) || defined(__IAR_SYSTEMS_ASM__)) */
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#endif /* _SAME70_GPBR_INSTANCE_ */
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