78 lines
3.5 KiB
C
78 lines
3.5 KiB
C
/**
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* Copyright (c) 2021 Raspberry Pi (Trading) Ltd.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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// =============================================================================
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// Register block : SYSINFO
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// Version : 1
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// Bus type : apb
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// Description : None
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// =============================================================================
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#ifndef HARDWARE_REGS_SYSINFO_DEFINED
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#define HARDWARE_REGS_SYSINFO_DEFINED
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// =============================================================================
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// Register : SYSINFO_CHIP_ID
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// Description : JEDEC JEP-106 compliant chip identifier.
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#define SYSINFO_CHIP_ID_OFFSET _u(0x00000000)
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#define SYSINFO_CHIP_ID_BITS _u(0xffffffff)
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#define SYSINFO_CHIP_ID_RESET _u(0x00000000)
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// -----------------------------------------------------------------------------
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// Field : SYSINFO_CHIP_ID_REVISION
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// Description : None
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#define SYSINFO_CHIP_ID_REVISION_RESET "-"
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#define SYSINFO_CHIP_ID_REVISION_BITS _u(0xf0000000)
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#define SYSINFO_CHIP_ID_REVISION_MSB _u(31)
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#define SYSINFO_CHIP_ID_REVISION_LSB _u(28)
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#define SYSINFO_CHIP_ID_REVISION_ACCESS "RO"
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// -----------------------------------------------------------------------------
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// Field : SYSINFO_CHIP_ID_PART
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// Description : None
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#define SYSINFO_CHIP_ID_PART_RESET "-"
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#define SYSINFO_CHIP_ID_PART_BITS _u(0x0ffff000)
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#define SYSINFO_CHIP_ID_PART_MSB _u(27)
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#define SYSINFO_CHIP_ID_PART_LSB _u(12)
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#define SYSINFO_CHIP_ID_PART_ACCESS "RO"
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// -----------------------------------------------------------------------------
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// Field : SYSINFO_CHIP_ID_MANUFACTURER
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// Description : None
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#define SYSINFO_CHIP_ID_MANUFACTURER_RESET "-"
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#define SYSINFO_CHIP_ID_MANUFACTURER_BITS _u(0x00000fff)
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#define SYSINFO_CHIP_ID_MANUFACTURER_MSB _u(11)
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#define SYSINFO_CHIP_ID_MANUFACTURER_LSB _u(0)
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#define SYSINFO_CHIP_ID_MANUFACTURER_ACCESS "RO"
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// =============================================================================
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// Register : SYSINFO_PLATFORM
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// Description : Platform register. Allows software to know what environment it
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// is running in.
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#define SYSINFO_PLATFORM_OFFSET _u(0x00000004)
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#define SYSINFO_PLATFORM_BITS _u(0x00000003)
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#define SYSINFO_PLATFORM_RESET _u(0x00000000)
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// -----------------------------------------------------------------------------
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// Field : SYSINFO_PLATFORM_ASIC
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// Description : None
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#define SYSINFO_PLATFORM_ASIC_RESET _u(0x0)
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#define SYSINFO_PLATFORM_ASIC_BITS _u(0x00000002)
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#define SYSINFO_PLATFORM_ASIC_MSB _u(1)
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#define SYSINFO_PLATFORM_ASIC_LSB _u(1)
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#define SYSINFO_PLATFORM_ASIC_ACCESS "RO"
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// -----------------------------------------------------------------------------
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// Field : SYSINFO_PLATFORM_FPGA
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// Description : None
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#define SYSINFO_PLATFORM_FPGA_RESET _u(0x0)
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#define SYSINFO_PLATFORM_FPGA_BITS _u(0x00000001)
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#define SYSINFO_PLATFORM_FPGA_MSB _u(0)
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#define SYSINFO_PLATFORM_FPGA_LSB _u(0)
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#define SYSINFO_PLATFORM_FPGA_ACCESS "RO"
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// =============================================================================
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// Register : SYSINFO_GITREF_RP2040
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// Description : Git hash of the chip source. Used to identify chip version.
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#define SYSINFO_GITREF_RP2040_OFFSET _u(0x00000040)
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#define SYSINFO_GITREF_RP2040_BITS _u(0xffffffff)
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#define SYSINFO_GITREF_RP2040_RESET "-"
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#define SYSINFO_GITREF_RP2040_MSB _u(31)
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#define SYSINFO_GITREF_RP2040_LSB _u(0)
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#define SYSINFO_GITREF_RP2040_ACCESS "RO"
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// =============================================================================
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#endif // HARDWARE_REGS_SYSINFO_DEFINED
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