217 lines
12 KiB
C
217 lines
12 KiB
C
/*******************************************************************************
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* Copyright (C) 2020, Huada Semiconductor Co., Ltd. All rights reserved.
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*
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* This software component is licensed by HDSC under BSD 3-Clause license
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* (the "License"); You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*/
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/******************************************************************************/
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/** \file hc32f460_timer4_sevt.h
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**
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** A detailed description is available at
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** @link Timer4SevtGroup Timer4SEVT description @endlink
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**
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** - 2018-11-02 CDT First version for Device Driver Library of Timer4SEVT.
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**
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******************************************************************************/
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#ifndef __HC32F460_TIMER4_SEVT_H__
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#define __HC32F460_TIMER4_SEVT_H__
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/*******************************************************************************
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* Include files
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******************************************************************************/
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#include "hc32_common.h"
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/* C binding of definitions if building with C++ compiler */
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/**
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*******************************************************************************
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** \defgroup Timer4SevtGroup Timer4 Special Event(Timer4SEVT)
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**
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******************************************************************************/
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//@{
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/*******************************************************************************
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* Global type definitions ('typedef')
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******************************************************************************/
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/**
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*******************************************************************************
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** \brief Timer4 SEVT channel enumeration
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**
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******************************************************************************/
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typedef enum en_timer4_sevt_ch
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{
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Timer4SevtCh0 = 0u, ///< Timer4 SEVT channel:0
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Timer4SevtCh1 = 1u, ///< Timer4 SEVT channel:1
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Timer4SevtCh2 = 2u, ///< Timer4 SEVT channel:2
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Timer4SevtCh3 = 3u, ///< Timer4 SEVT channel:3
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Timer4SevtCh4 = 4u, ///< Timer4 SEVT channel:4
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Timer4SevtCh5 = 5u, ///< Timer4 SEVT channel:5
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} en_timer4_sevt_ch_t;
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/**
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*******************************************************************************
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** \brief Timer4 Special-EVT buffer type of SCCR and SCMR
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**
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******************************************************************************/
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typedef enum en_timer4_sevt_buf
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{
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SevtBufDisable = 0u, ///< Disable Timer4 Special-EVT buffer function
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SevtBufCntZero = 1u, ///< Timer4 Special-EVT transfer buffer register of SCCR and SCMR when counter value of Cnt connected= 0x0000
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SevtBufCntPeak = 2u, ///< Timer4 Special-EVT transfer buffer register of SCCR and SCMR when counter value of Cnt connected= TCCP
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SevtBufCntZeroOrCntPeak = 3u, ///< Timer4 Special-EVT transfer buffer register of SCCR and SCMR both when counter value of Cnt connected= 0x0000 and TCCP
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SevtBufCntZeroZicZero = 4u, ///< Timer4 Special-EVT transfer buffer register of SCCR and SCMR when counter value of Cnt connected= 0x0000 and zero value detection mask counter value is 0
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SevtBufCntPeakPicZero = 5u, ///< Timer4 Special-EVT transfer buffer register of SCCR and SCMR when counter value of Cnt connected= peak and peak value detection mask counter value is 0
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SevtBufCntZeroZicZeroOrCntPeakPicZero = 6u, ///< Timer4 Special-EVT transfer buffer register of SCCR and SCMR when counter value of Cnt connected= 0x0000 and zero value detection mask counter value is 0
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///< or counter value of CNT connected= peak and peak value detection mask counter value is 0
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} en_timer4_sevt_buf_t;
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/**
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*******************************************************************************
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** \brief Timer4 Special-EVT output trigger signal type
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**
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******************************************************************************/
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typedef enum en_timer4_sevt_trigger_evt
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{
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SevtTrgEvtSCMUH = 0u, ///< Timer4 Special-EVT Event: TMR4_Ux_SCMUH
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SevtTrgEvtSCMUL = 1u, ///< Timer4 Special-EVT Event: TMR4_Ux_SCMUL
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SevtTrgEvtSCMVH = 2u, ///< Timer4 Special-EVT Event: TMR4_Ux_SCMVH
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SevtTrgEvtSCMVL = 3u, ///< Timer4 Special-EVT Event: TMR4_Ux_SCMVL
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SevtTrgEvtSCMWH = 4u, ///< Timer4 Special-EVT Event: TMR4_Ux_SCMWH
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SevtTrgEvtSCMWL = 5u, ///< Timer4 Special-EVT Event: TMR4_Ux_SCMWL
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} en_timer4_sevt_trigger_evt_t;
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/**
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*******************************************************************************
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** \brief Timer4 Special-EVT OCCRx select type
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**
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******************************************************************************/
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typedef enum en_timer4_sevt_occr_sel
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{
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SevtSelOCCRxh = 0u, ///< Select OCCRxh of high channel
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SevtSelOCCRxl = 1u, ///< Select OCCRxl of low channel
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} en_timer4_sevt_occr_sel_t;
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/**
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*******************************************************************************
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** \brief Timer4 Special-EVT running mode
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**
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******************************************************************************/
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typedef enum en_timer4_sevt_mode
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{
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SevtCompareTrigMode = 0u, ///< Select Timer4 Special-EVT compare mode
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SevtDelayTrigMode = 1u, ///< Select Timer4 Special-EVT delay mode
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} en_timer4_sevt_mode_t;
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/**
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*******************************************************************************
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** \brief Timer4 SEVT mask times enumeration
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**
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******************************************************************************/
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typedef enum en_timer4_sevt_mask
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{
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Timer4SevtMask0 = 0u, ///< Mask 0 time.
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Timer4SevtMask1 = 1u, ///< Mask 1 times.
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Timer4SevtMask2 = 2u, ///< Mask 2 times.
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Timer4SevtMask3 = 3u, ///< Mask 3 times.
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Timer4SevtMask4 = 4u, ///< Mask 4 times.
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Timer4SevtMask5 = 5u, ///< Mask 5 times.
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Timer4SevtMask6 = 6u, ///< Mask 6 times.
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Timer4SevtMask7 = 7u, ///< Mask 7 times.
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Timer4SevtMask8 = 8u, ///< Mask 8 times.
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Timer4SevtMask9 = 9u, ///< Mask 9 times.
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Timer4SevtMask10 = 10u, ///< Mask 10 times.
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Timer4SevtMask11 = 11u, ///< Mask 11 times.
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Timer4SevtMask12 = 12u, ///< Mask 12 times.
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Timer4SevtMask13 = 13u, ///< Mask 13 times.
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Timer4SevtMask14 = 14u, ///< Mask 14 times.
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Timer4SevtMask15 = 15u, ///< Mask 15 times.
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} en_timer4_sevt_mask_t;
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/**
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*******************************************************************************
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** \brief Timer4 Special-EVT trigger condition
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**
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******************************************************************************/
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typedef struct stc_timer4_sevt_trigger_cond
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{
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en_functional_state_t enDownMatchCmd; ///< Enable: Send trigger signal when match with SCCR&SCMR and Timer4CNT count down.
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///< Disable: Don't send trigger signal when match with SCCR&SCMR and Timer4CNT count down.
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en_functional_state_t enPeakMatchCmd; ///< Enable: Send trigger signal when match with SCCR&SCMR and Timer4CNT count peak.
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///< Disable: Don't send trigger signal when match with SCCR&SCMR and Timer4CNT count peak.
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en_functional_state_t enUpMatchCmd; ///< Enable: Send trigger signal when match with SCCR&SCMR and Timer4CNT count up.
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///< Disable: Don't send trigger signal when match with SCCR&SCMR and Timer4CNT count up.
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en_functional_state_t enZeroMatchCmd; ///< Enable: Send trigger signal when match with SCCR&SCMR and Timer4CNT count zero.
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///< Disable: Don't send trigger signal when match with SCCR&SCMR and Timer4CNT count zero.
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} stc_timer4_sevt_trigger_cond_t;
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/**
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*******************************************************************************
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** \brief Timer4 Special-EVT initialization configuration
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**
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******************************************************************************/
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typedef struct stc_timer4_sevt_init
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{
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en_timer4_sevt_buf_t enBuf; ///< Configure Timer4 Special-EVT Buffer transfer type and this parameter can be a value of @ref en_timer4_sevt_buf_t
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en_timer4_sevt_mode_t enMode; ///< Configure Timer4 Special-EVT Running mode and this parameter can be a value of @ref en_timer4_sevt_mode_t
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en_timer4_sevt_occr_sel_t enOccrSel; ///< Select Timer4 Special-EVT Occr channel and this parameter can be a value of @ref en_timer4_sevt_occr_sel_t
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en_timer4_sevt_trigger_evt_t enTrigEvt; ///< Configure Timer4 Special-EVT Trigger type and this parameter can be a value of @ref en_timer4_sevt_trigger_evt_t
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en_functional_state_t enCmpAmcZicCmd; ///< Enable: Comparison is performed with the CNT zero interrupt mask counter.
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///< Disable: Comparison is not performed with the CNT zero interrupt mask counter.
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en_functional_state_t enCmpAmcPicCmd; ///< Enable: Comparison is performed with the CNT peak interrupt mask counter.
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///< Disable: Comparison is not performed with the CNT peak interrupt mask counter.
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en_timer4_sevt_mask_t enMaskTimes; ///< Specifies start time by the value to be compared with the CNT interrupt mask counter. And this parameter can be a value of @ref en_timer4_sevt_mask_t
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} stc_timer4_sevt_init_t;
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/*******************************************************************************
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* Global pre-processor symbols/macros ('#define')
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******************************************************************************/
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/*******************************************************************************
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* Global variable definitions ('extern')
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******************************************************************************/
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/*******************************************************************************
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* Global function prototypes (definition in C source)
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******************************************************************************/
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en_result_t TIMER4_SEVT_Init(M4_TMR4_TypeDef *TMR4x,
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en_timer4_sevt_ch_t enCh,
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const stc_timer4_sevt_init_t *pstcInitCfg);
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en_result_t TIMER4_SEVT_DeInit(M4_TMR4_TypeDef *TMR4x,
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en_timer4_sevt_ch_t enCh);
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en_result_t TIMER4_SEVT_SetTriggerEvent(M4_TMR4_TypeDef *TMR4x,
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en_timer4_sevt_ch_t enCh,
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en_timer4_sevt_trigger_evt_t enTrgEvt);
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en_result_t TIMER4_SEVT_SetTriggerCond(M4_TMR4_TypeDef *TMR4x,
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en_timer4_sevt_ch_t enCh,
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const stc_timer4_sevt_trigger_cond_t *pstcTrigCond);
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en_result_t TIMER4_SEVT_WriteSCCR(M4_TMR4_TypeDef *TMR4x,
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en_timer4_sevt_ch_t enCh,
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uint16_t u16SccrVal);
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uint16_t TIMER4_SEVT_ReadSCCR(M4_TMR4_TypeDef *TMR4x,
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en_timer4_sevt_ch_t enCh);
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//@} // Timer4SevtGroup
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#ifdef __cplusplus
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}
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#endif
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#endif /* __HC32F460_TIMER4_SEVT_H__ */
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/*******************************************************************************
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* EOF (not truncated)
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******************************************************************************/
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