441 lines
13 KiB
C
441 lines
13 KiB
C
/**
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******************************************************************************
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* @file stm32f1xx_ll_pwr.h
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* @author MCD Application Team
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* @brief Header file of PWR LL module.
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2016 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F1xx_LL_PWR_H
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#define __STM32F1xx_LL_PWR_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f1xx.h"
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/** @addtogroup STM32F1xx_LL_Driver
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* @{
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*/
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#if defined(PWR)
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/** @defgroup PWR_LL PWR
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* @{
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*/
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/* Private types -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private constants ---------------------------------------------------------*/
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/* Private macros ------------------------------------------------------------*/
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/* Exported types ------------------------------------------------------------*/
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup PWR_LL_Exported_Constants PWR Exported Constants
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* @{
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*/
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/** @defgroup PWR_LL_EC_CLEAR_FLAG Clear Flags Defines
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* @brief Flags defines which can be used with LL_PWR_WriteReg function
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* @{
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*/
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#define LL_PWR_CR_CSBF PWR_CR_CSBF /*!< Clear standby flag */
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#define LL_PWR_CR_CWUF PWR_CR_CWUF /*!< Clear wakeup flag */
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/**
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* @}
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*/
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/** @defgroup PWR_LL_EC_GET_FLAG Get Flags Defines
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* @brief Flags defines which can be used with LL_PWR_ReadReg function
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* @{
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*/
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#define LL_PWR_CSR_WUF PWR_CSR_WUF /*!< Wakeup flag */
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#define LL_PWR_CSR_SBF PWR_CSR_SBF /*!< Standby flag */
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#define LL_PWR_CSR_PVDO PWR_CSR_PVDO /*!< Power voltage detector output flag */
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#define LL_PWR_CSR_EWUP1 PWR_CSR_EWUP /*!< Enable WKUP pin 1 */
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/**
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* @}
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*/
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/** @defgroup PWR_LL_EC_MODE_PWR Mode Power
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* @{
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*/
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#define LL_PWR_MODE_STOP_MAINREGU 0x00000000U /*!< Enter Stop mode when the CPU enters deepsleep */
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#define LL_PWR_MODE_STOP_LPREGU (PWR_CR_LPDS) /*!< Enter Stop mode (with low power Regulator ON) when the CPU enters deepsleep */
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#define LL_PWR_MODE_STANDBY (PWR_CR_PDDS) /*!< Enter Standby mode when the CPU enters deepsleep */
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/**
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* @}
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*/
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/** @defgroup PWR_LL_EC_REGU_MODE_DS_MODE Regulator Mode In Deep Sleep Mode
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* @{
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*/
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#define LL_PWR_REGU_DSMODE_MAIN 0x00000000U /*!< Voltage Regulator in main mode during deepsleep mode */
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#define LL_PWR_REGU_DSMODE_LOW_POWER (PWR_CR_LPDS) /*!< Voltage Regulator in low-power mode during deepsleep mode */
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/**
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* @}
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*/
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/** @defgroup PWR_LL_EC_PVDLEVEL Power Voltage Detector Level
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* @{
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*/
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#define LL_PWR_PVDLEVEL_0 (PWR_CR_PLS_LEV0) /*!< Voltage threshold detected by PVD 2.2 V */
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#define LL_PWR_PVDLEVEL_1 (PWR_CR_PLS_LEV1) /*!< Voltage threshold detected by PVD 2.3 V */
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#define LL_PWR_PVDLEVEL_2 (PWR_CR_PLS_LEV2) /*!< Voltage threshold detected by PVD 2.4 V */
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#define LL_PWR_PVDLEVEL_3 (PWR_CR_PLS_LEV3) /*!< Voltage threshold detected by PVD 2.5 V */
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#define LL_PWR_PVDLEVEL_4 (PWR_CR_PLS_LEV4) /*!< Voltage threshold detected by PVD 2.6 V */
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#define LL_PWR_PVDLEVEL_5 (PWR_CR_PLS_LEV5) /*!< Voltage threshold detected by PVD 2.7 V */
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#define LL_PWR_PVDLEVEL_6 (PWR_CR_PLS_LEV6) /*!< Voltage threshold detected by PVD 2.8 V */
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#define LL_PWR_PVDLEVEL_7 (PWR_CR_PLS_LEV7) /*!< Voltage threshold detected by PVD 2.9 V */
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/**
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* @}
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*/
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/** @defgroup PWR_LL_EC_WAKEUP_PIN Wakeup Pins
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* @{
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*/
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#define LL_PWR_WAKEUP_PIN1 (PWR_CSR_EWUP) /*!< WKUP pin 1 : PA0 */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported macro ------------------------------------------------------------*/
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/** @defgroup PWR_LL_Exported_Macros PWR Exported Macros
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* @{
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*/
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/** @defgroup PWR_LL_EM_WRITE_READ Common write and read registers Macros
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* @{
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*/
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/**
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* @brief Write a value in PWR register
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* @param __REG__ Register to be written
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* @param __VALUE__ Value to be written in the register
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* @retval None
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*/
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#define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__))
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/**
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* @brief Read a value in PWR register
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* @param __REG__ Register to be read
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* @retval Register value
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*/
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#define LL_PWR_ReadReg(__REG__) READ_REG(PWR->__REG__)
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Exported functions --------------------------------------------------------*/
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/** @defgroup PWR_LL_Exported_Functions PWR Exported Functions
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* @{
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*/
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/** @defgroup PWR_LL_EF_Configuration Configuration
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* @{
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*/
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/**
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* @brief Enable access to the backup domain
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* @rmtoll CR DBP LL_PWR_EnableBkUpAccess
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* @retval None
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*/
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__STATIC_INLINE void LL_PWR_EnableBkUpAccess(void)
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{
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SET_BIT(PWR->CR, PWR_CR_DBP);
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}
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/**
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* @brief Disable access to the backup domain
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* @rmtoll CR DBP LL_PWR_DisableBkUpAccess
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* @retval None
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*/
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__STATIC_INLINE void LL_PWR_DisableBkUpAccess(void)
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{
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CLEAR_BIT(PWR->CR, PWR_CR_DBP);
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}
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/**
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* @brief Check if the backup domain is enabled
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* @rmtoll CR DBP LL_PWR_IsEnabledBkUpAccess
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* @retval State of bit (1 or 0).
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*/
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__STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpAccess(void)
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{
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return (READ_BIT(PWR->CR, PWR_CR_DBP) == (PWR_CR_DBP));
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}
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/**
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* @brief Set voltage Regulator mode during deep sleep mode
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* @rmtoll CR LPDS LL_PWR_SetRegulModeDS
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* @param RegulMode This parameter can be one of the following values:
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* @arg @ref LL_PWR_REGU_DSMODE_MAIN
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* @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
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* @retval None
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*/
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__STATIC_INLINE void LL_PWR_SetRegulModeDS(uint32_t RegulMode)
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{
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MODIFY_REG(PWR->CR, PWR_CR_LPDS, RegulMode);
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}
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/**
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* @brief Get voltage Regulator mode during deep sleep mode
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* @rmtoll CR LPDS LL_PWR_GetRegulModeDS
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* @retval Returned value can be one of the following values:
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* @arg @ref LL_PWR_REGU_DSMODE_MAIN
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* @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
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*/
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__STATIC_INLINE uint32_t LL_PWR_GetRegulModeDS(void)
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{
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return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPDS));
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}
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/**
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* @brief Set Power Down mode when CPU enters deepsleep
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* @rmtoll CR PDDS LL_PWR_SetPowerMode\n
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* @rmtoll CR LPDS LL_PWR_SetPowerMode
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* @param PDMode This parameter can be one of the following values:
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* @arg @ref LL_PWR_MODE_STOP_MAINREGU
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* @arg @ref LL_PWR_MODE_STOP_LPREGU
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* @arg @ref LL_PWR_MODE_STANDBY
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* @retval None
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*/
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__STATIC_INLINE void LL_PWR_SetPowerMode(uint32_t PDMode)
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{
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MODIFY_REG(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS), PDMode);
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}
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/**
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* @brief Get Power Down mode when CPU enters deepsleep
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* @rmtoll CR PDDS LL_PWR_GetPowerMode\n
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* @rmtoll CR LPDS LL_PWR_GetPowerMode
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* @retval Returned value can be one of the following values:
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* @arg @ref LL_PWR_MODE_STOP_MAINREGU
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* @arg @ref LL_PWR_MODE_STOP_LPREGU
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* @arg @ref LL_PWR_MODE_STANDBY
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*/
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__STATIC_INLINE uint32_t LL_PWR_GetPowerMode(void)
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{
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return (uint32_t)(READ_BIT(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS)));
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}
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/**
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* @brief Configure the voltage threshold detected by the Power Voltage Detector
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* @rmtoll CR PLS LL_PWR_SetPVDLevel
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* @param PVDLevel This parameter can be one of the following values:
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* @arg @ref LL_PWR_PVDLEVEL_0
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* @arg @ref LL_PWR_PVDLEVEL_1
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* @arg @ref LL_PWR_PVDLEVEL_2
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* @arg @ref LL_PWR_PVDLEVEL_3
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* @arg @ref LL_PWR_PVDLEVEL_4
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* @arg @ref LL_PWR_PVDLEVEL_5
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* @arg @ref LL_PWR_PVDLEVEL_6
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* @arg @ref LL_PWR_PVDLEVEL_7
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* @retval None
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*/
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__STATIC_INLINE void LL_PWR_SetPVDLevel(uint32_t PVDLevel)
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{
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MODIFY_REG(PWR->CR, PWR_CR_PLS, PVDLevel);
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}
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/**
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* @brief Get the voltage threshold detection
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* @rmtoll CR PLS LL_PWR_GetPVDLevel
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* @retval Returned value can be one of the following values:
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* @arg @ref LL_PWR_PVDLEVEL_0
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* @arg @ref LL_PWR_PVDLEVEL_1
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* @arg @ref LL_PWR_PVDLEVEL_2
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* @arg @ref LL_PWR_PVDLEVEL_3
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* @arg @ref LL_PWR_PVDLEVEL_4
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* @arg @ref LL_PWR_PVDLEVEL_5
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* @arg @ref LL_PWR_PVDLEVEL_6
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* @arg @ref LL_PWR_PVDLEVEL_7
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*/
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__STATIC_INLINE uint32_t LL_PWR_GetPVDLevel(void)
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{
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return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PLS));
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}
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/**
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* @brief Enable Power Voltage Detector
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* @rmtoll CR PVDE LL_PWR_EnablePVD
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* @retval None
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*/
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__STATIC_INLINE void LL_PWR_EnablePVD(void)
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{
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SET_BIT(PWR->CR, PWR_CR_PVDE);
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}
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/**
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* @brief Disable Power Voltage Detector
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* @rmtoll CR PVDE LL_PWR_DisablePVD
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* @retval None
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*/
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__STATIC_INLINE void LL_PWR_DisablePVD(void)
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{
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CLEAR_BIT(PWR->CR, PWR_CR_PVDE);
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}
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/**
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* @brief Check if Power Voltage Detector is enabled
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* @rmtoll CR PVDE LL_PWR_IsEnabledPVD
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* @retval State of bit (1 or 0).
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*/
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__STATIC_INLINE uint32_t LL_PWR_IsEnabledPVD(void)
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{
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return (READ_BIT(PWR->CR, PWR_CR_PVDE) == (PWR_CR_PVDE));
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}
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/**
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* @brief Enable the WakeUp PINx functionality
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* @rmtoll CSR EWUP LL_PWR_EnableWakeUpPin
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* @param WakeUpPin This parameter can be one of the following values:
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* @arg @ref LL_PWR_WAKEUP_PIN1
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* @retval None
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*/
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__STATIC_INLINE void LL_PWR_EnableWakeUpPin(uint32_t WakeUpPin)
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{
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SET_BIT(PWR->CSR, WakeUpPin);
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}
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/**
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* @brief Disable the WakeUp PINx functionality
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* @rmtoll CSR EWUP LL_PWR_DisableWakeUpPin
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* @param WakeUpPin This parameter can be one of the following values:
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* @arg @ref LL_PWR_WAKEUP_PIN1
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* @retval None
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*/
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__STATIC_INLINE void LL_PWR_DisableWakeUpPin(uint32_t WakeUpPin)
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{
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CLEAR_BIT(PWR->CSR, WakeUpPin);
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}
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/**
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* @brief Check if the WakeUp PINx functionality is enabled
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* @rmtoll CSR EWUP LL_PWR_IsEnabledWakeUpPin
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* @param WakeUpPin This parameter can be one of the following values:
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* @arg @ref LL_PWR_WAKEUP_PIN1
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* @retval State of bit (1 or 0).
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*/
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__STATIC_INLINE uint32_t LL_PWR_IsEnabledWakeUpPin(uint32_t WakeUpPin)
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{
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return (READ_BIT(PWR->CSR, WakeUpPin) == (WakeUpPin));
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}
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/**
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* @}
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*/
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/** @defgroup PWR_LL_EF_FLAG_Management FLAG_Management
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* @{
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*/
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/**
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* @brief Get Wake-up Flag
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* @rmtoll CSR WUF LL_PWR_IsActiveFlag_WU
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* @retval State of bit (1 or 0).
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*/
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__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU(void)
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{
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return (READ_BIT(PWR->CSR, PWR_CSR_WUF) == (PWR_CSR_WUF));
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}
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/**
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* @brief Get Standby Flag
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* @rmtoll CSR SBF LL_PWR_IsActiveFlag_SB
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* @retval State of bit (1 or 0).
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*/
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__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_SB(void)
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{
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return (READ_BIT(PWR->CSR, PWR_CSR_SBF) == (PWR_CSR_SBF));
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}
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/**
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* @brief Indicate whether VDD voltage is below the selected PVD threshold
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* @rmtoll CSR PVDO LL_PWR_IsActiveFlag_PVDO
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* @retval State of bit (1 or 0).
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*/
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__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVDO(void)
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{
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return (READ_BIT(PWR->CSR, PWR_CSR_PVDO) == (PWR_CSR_PVDO));
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}
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/**
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* @brief Clear Standby Flag
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* @rmtoll CR CSBF LL_PWR_ClearFlag_SB
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* @retval None
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*/
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__STATIC_INLINE void LL_PWR_ClearFlag_SB(void)
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{
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SET_BIT(PWR->CR, PWR_CR_CSBF);
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}
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/**
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* @brief Clear Wake-up Flags
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* @rmtoll CR CWUF LL_PWR_ClearFlag_WU
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* @retval None
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*/
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__STATIC_INLINE void LL_PWR_ClearFlag_WU(void)
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{
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SET_BIT(PWR->CR, PWR_CR_CWUF);
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}
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/**
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* @}
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*/
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#if defined(USE_FULL_LL_DRIVER)
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/** @defgroup PWR_LL_EF_Init De-initialization function
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* @{
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*/
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ErrorStatus LL_PWR_DeInit(void);
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/**
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* @}
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*/
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#endif /* USE_FULL_LL_DRIVER */
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/**
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* @}
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*/
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/**
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* @}
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*/
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#endif /* defined(PWR) */
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __STM32F1xx_LL_PWR_H */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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