59 lines
2.7 KiB
C
59 lines
2.7 KiB
C
/**
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* \file
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*
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* \brief Instance description for CCL
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*
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* Copyright (c) 2018 Microchip Technology Inc.
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*
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* \asf_license_start
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*
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* \page License
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License"); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the Licence at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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* \asf_license_stop
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*
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*/
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#ifndef _SAMC21_CCL_INSTANCE_
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#define _SAMC21_CCL_INSTANCE_
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/* ========== Register definition for CCL peripheral ========== */
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#if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
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#define REG_CCL_CTRL (0x42005C00) /**< \brief (CCL) Control */
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#define REG_CCL_SEQCTRL0 (0x42005C04) /**< \brief (CCL) SEQ Control x 0 */
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#define REG_CCL_SEQCTRL1 (0x42005C05) /**< \brief (CCL) SEQ Control x 1 */
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#define REG_CCL_LUTCTRL0 (0x42005C08) /**< \brief (CCL) LUT Control x 0 */
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#define REG_CCL_LUTCTRL1 (0x42005C0C) /**< \brief (CCL) LUT Control x 1 */
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#define REG_CCL_LUTCTRL2 (0x42005C10) /**< \brief (CCL) LUT Control x 2 */
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#define REG_CCL_LUTCTRL3 (0x42005C14) /**< \brief (CCL) LUT Control x 3 */
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#else
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#define REG_CCL_CTRL (*(RwReg8 *)0x42005C00UL) /**< \brief (CCL) Control */
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#define REG_CCL_SEQCTRL0 (*(RwReg8 *)0x42005C04UL) /**< \brief (CCL) SEQ Control x 0 */
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#define REG_CCL_SEQCTRL1 (*(RwReg8 *)0x42005C05UL) /**< \brief (CCL) SEQ Control x 1 */
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#define REG_CCL_LUTCTRL0 (*(RwReg *)0x42005C08UL) /**< \brief (CCL) LUT Control x 0 */
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#define REG_CCL_LUTCTRL1 (*(RwReg *)0x42005C0CUL) /**< \brief (CCL) LUT Control x 1 */
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#define REG_CCL_LUTCTRL2 (*(RwReg *)0x42005C10UL) /**< \brief (CCL) LUT Control x 2 */
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#define REG_CCL_LUTCTRL3 (*(RwReg *)0x42005C14UL) /**< \brief (CCL) LUT Control x 3 */
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#endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
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/* ========== Instance parameters for CCL peripheral ========== */
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#define CCL_GCLK_ID 38 // GCLK index for CCL
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#define CCL_IO_NUM 12 // Numer of input pins
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#define CCL_LUT_NUM 4 // Number of LUT in a CCL
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#define CCL_SEQ_NUM 2 // Number of SEQ in a CCL
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#endif /* _SAMC21_CCL_INSTANCE_ */
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