109 lines
3.3 KiB
C
109 lines
3.3 KiB
C
// Hardware PWM support on samd21
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//
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// Copyright (C) 2018-2019 Kevin O'Connor <kevin@koconnor.net>
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//
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// This file may be distributed under the terms of the GNU GPLv3 license.
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#include "command.h" // shutdown
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#include "gpio.h" // gpio_pwm_write
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#include "internal.h" // GPIO
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#include "sched.h" // sched_shutdown
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// Available TCC devices
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struct tcc_info_s {
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Tcc *tcc;
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uint32_t pclk_id, pm_id;
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};
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static const struct tcc_info_s tcc_info[] = {
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{ TCC0, TCC0_GCLK_ID, ID_TCC0 },
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{ TCC1, TCC1_GCLK_ID, ID_TCC1 },
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{ TCC2, TCC2_GCLK_ID, ID_TCC2 },
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};
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// PWM pins and their TCC device/channel
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struct gpio_pwm_info {
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uint8_t gpio, ptype, tcc, channel;
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};
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static const struct gpio_pwm_info pwm_regs[] = {
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{ GPIO('A', 4), 'E', 0, 0 },
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{ GPIO('A', 5), 'E', 0, 1 },
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{ GPIO('A', 6), 'E', 1, 0 },
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{ GPIO('A', 7), 'E', 1, 1 },
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{ GPIO('A', 8), 'E', 0, 0 },
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{ GPIO('A', 9), 'E', 0, 1 },
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{ GPIO('A', 10), 'E', 1, 0 },
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{ GPIO('A', 11), 'E', 1, 1 },
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{ GPIO('A', 12), 'E', 2, 0 },
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{ GPIO('A', 13), 'E', 2, 1 },
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{ GPIO('A', 16), 'E', 2, 0 },
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{ GPIO('A', 17), 'E', 2, 1 },
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{ GPIO('A', 18), 'F', 0, 2 },
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{ GPIO('A', 19), 'F', 0, 3 },
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{ GPIO('A', 24), 'F', 1, 2 },
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{ GPIO('A', 25), 'F', 1, 3 },
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{ GPIO('A', 30), 'E', 1, 0 },
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{ GPIO('A', 31), 'E', 1, 1 },
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{ GPIO('B', 30), 'E', 0, 0 },
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{ GPIO('B', 31), 'E', 0, 1 },
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};
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#define MAX_PWM 255
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DECL_CONSTANT("PWM_MAX", MAX_PWM);
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struct gpio_pwm
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gpio_pwm_setup(uint8_t pin, uint32_t cycle_time, uint8_t val)
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{
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// Find pin in pwm_regs table
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const struct gpio_pwm_info *p = pwm_regs;
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for (; ; p++) {
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if (p >= &pwm_regs[ARRAY_SIZE(pwm_regs)])
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shutdown("Not a valid PWM pin");
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if (p->gpio == pin)
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break;
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}
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// Enable timer clock
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enable_pclock(tcc_info[p->tcc].pclk_id, tcc_info[p->tcc].pm_id);
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// Map cycle_time to pwm clock divisor
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uint32_t cs;
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switch (cycle_time) {
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case 0 ... (1+2) * MAX_PWM / 2 - 1: cs = 0; break;
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case (1+2) * MAX_PWM / 2 ... (2+4) * MAX_PWM / 2 - 1: cs = 1; break;
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case (2+4) * MAX_PWM / 2 ... (4+8) * MAX_PWM / 2 - 1: cs = 2; break;
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case (4+8) * MAX_PWM / 2 ... (8+16) * MAX_PWM / 2 - 1: cs = 3; break;
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case (8+16) * MAX_PWM / 2 ... (16+64) * MAX_PWM / 2 - 1: cs = 4; break;
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case (16+64) * MAX_PWM / 2 ... (64+256) * MAX_PWM / 2 - 1: cs = 5; break;
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case (64+256) * MAX_PWM / 2 ... (256+1024) * MAX_PWM / 2 - 1: cs = 6; break;
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default: cs = 7; break;
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}
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uint32_t ctrla = TCC_CTRLA_ENABLE | TCC_CTRLA_PRESCALER(cs);
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// Enable timer
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Tcc *tcc = tcc_info[p->tcc].tcc;
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uint32_t old_ctrla = tcc->CTRLA.reg;
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if (old_ctrla != ctrla) {
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if (old_ctrla & TCC_CTRLA_ENABLE)
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shutdown("PWM already programmed at different speed");
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tcc->CTRLA.reg = ctrla & ~TCC_CTRLA_ENABLE;
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tcc->WAVE.reg = TCC_WAVE_WAVEGEN_NPWM;
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tcc->PER.reg = MAX_PWM;
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tcc->CTRLA.reg = ctrla;
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}
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// Set initial value
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struct gpio_pwm g = (struct gpio_pwm) { (void*)&tcc->CCB[p->channel].reg };
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gpio_pwm_write(g, val);
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// Route output to pin
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gpio_peripheral(pin, p->ptype, 0);
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return g;
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}
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void
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gpio_pwm_write(struct gpio_pwm g, uint8_t val)
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{
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*(volatile uint32_t*)g.reg = val;
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}
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