Kevin O'Connor e3cbe7ea36 stm32: Clear SPE flag on a change to SPI CR1 register ... The stm32 specs indicate that the SPE bit must be cleared before changing the CPHA or CPOL bits. Reported by @cbc02009 and @bigtreetech. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>		2022-02-10 18:12:01 -05:00
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Kconfig	stm32: Add remap CAN to PD0/PD1 for stm32f103 (#5173)	2022-01-26 18:06:55 -05:00
Makefile	stm32: Unify enable_pclock() code	2021-12-30 12:18:05 -05:00
adc.c	stm32: Add an MACH_STM32F4x5 alias for F405, F407, and F429 chips	2021-10-06 19:56:46 -04:00
can.c	…
chipid.c	…
clockline.c	stm32: Unify enable_pclock() code	2021-12-30 12:18:05 -05:00
gpio.c	…
gpio.h	…
gpioperiph.c	stm32: Initial support for stm32g0	2021-12-23 22:15:25 -05:00
hard_pwm.c	stm32: Rework #if pin definition clauses in hard_pwm.c	2021-10-11 21:43:56 -04:00
i2c.c	…
internal.h	stm32: Unify enable_pclock() code	2021-12-30 12:18:05 -05:00
serial.c	…
spi.c	stm32: Clear SPE flag on a change to SPI CR1 register	2022-02-10 18:12:01 -05:00
stm32f0.c	stm32: Unify enable_pclock() code	2021-12-30 12:18:05 -05:00
stm32f0_adc.c	stm32: Fix ADC on stm32f042	2021-12-24 19:27:04 -05:00
stm32f0_i2c.c	…
stm32f0_serial.c	stm32: Initial support for stm32g0	2021-12-23 22:15:25 -05:00
stm32f0_timer.c	…
stm32f1.c	stm32: Add remap CAN to PD0/PD1 for stm32f103 (#5173)	2022-01-26 18:06:55 -05:00
stm32f4.c	stm32: Unify enable_pclock() code	2021-12-30 12:18:05 -05:00
stm32g0.c	stm32: Unify enable_pclock() code	2021-12-30 12:18:05 -05:00
stm32h7.c	stm32: Unify enable_pclock() code	2021-12-30 12:18:05 -05:00
stm32h7_adc.c	stm32: Fix ADC on stm32h7 (#5239)	2022-02-06 18:29:53 -05:00
stm32h7_serial.c	stm32: Add UART4 to stm32h7 (#4848)	2021-11-19 10:27:56 -05:00
stm32h7_spi.c	stm32: Add stm32h7 SPI support (#4850)	2021-11-20 18:23:23 -05:00
usbfs.c	stm32: Add support for USB on stm32g0	2021-12-23 22:15:26 -05:00
usbotg.c	stm32: Add USBOTG support to stm32h7	2021-11-21 08:12:32 -05:00
watchdog.c	…