Unify the handling of the enable_pclock() and is_enabled_pclock() code
across all stm32 chips. All chips will now perform a peripheral reset
on enable_pclock() (this is a change for stm32f0 and stm32h7). The
enable_pclock() code will now also disable irqs during the enable.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Avoid read-modify-write operations where possible. The register
values are in a known state so prefer absolute writes.
Improve handling of race conditions with hardware updates.
Remove the adc reference from "struct gpio_adc" as it is a constant.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Use a fixed layout for the USB transfer memory and remove the ep_mem
struct definition.
This is in preparation for stm32g0 support.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
The gpio_peripheral() code is the same in stm32f0.c, stm32f4.c, and
stm32h7.c. Move that function to a new gpioperiph.c file to avoid
code duplication.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Don't go above 400Mhz as otherwise it causes 32bit rollover issues.
(Parts of the code expect a rollover will not occur faster than 10
seconds.)
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Multiplying the desired bitrate by 4 results in half the
desired period and thus twice the desired bitrate.
Signed-off-by: Alex Maclean <monkeh@monkeh.net>
This clock is only needed for low-power operation mode,
and wasn't correctly configured anyway (should be 48MHz).
Signed-off-by: Alex Maclean <monkeh@monkeh.net>
Commit 9ecddd1b fixed a serious error (introduced in 7d95a004). Force
a protocol version change so users are aware of the need to update the
mcu code.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Commit 7d95a004 introduced a defect - if the cached timer pointed to
by last_insert did not reschedule itself then the cache would not be
in a valid state and other active timers may not get properly
rescheduled.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Add an optimized step function for drivers that support stepping on
both rising and falling edges of the step pin. Enable this
optimization on 32bit ARM micro-controllers. Automatically detect
this capability in the host code and enable on TMC drivers running in
SPI/UART mode.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Remove the STEP_DELAY Kconfig option and replace it with a per-stepper
step_pulse_duration printer.cfg config option.
The AVR code will continue to have optimized code to step and "unstep"
in the same function (which is automatically activated when the step
delay is 40 ticks or less). This change removes the Kconfig option
for single function step/unstep on 32bit processors.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
The floating point unit must be enabled in order to use it and Klipper
does not currently implement that. Newer versions of gcc may spill
registers to the floating point unit causing failures.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
The floating point unit must be enabled in order to use it and Klipper
does not currently implement that. Newer versions of gcc may spill
registers to the floating point unit causing failures.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
The floating point unit must be enabled in order to use it and Klipper
does not currently implement that. Newer versions of gcc may spill
registers to the floating point unit causing failures.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Tracking of the last reset is no longer needed after commit 8f76e53c.
Remove the code tracking that status and remove the flag definition.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Some architectures do better if the global variables accessed from the
timer dispatch code are in a struct.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Some versions of gcc, in some cases, decide that it is OK to move the
read to `INTR` to right after clearing the `SETUP_REC` bit of
`SIE_STATUS`, instead of after the `memcpy`.
The rp2040 datasheet doesn't appear to say anything about how quickly
the `SETUP_REC` bit will be cleared in `INTR`, but regardless the
compiler should not be re-ordering the read like this.
Here we force the correct ordering using a memory barrier.
Signed-off-by: Lasse Dalegaard <dalegaard@gmail.com>
Kevin O'Connor