The sram matrix configuration is, bizarrely, configured with a slow
default. It will typically add an extra wait state to every memory
access. Set the matrix sram controller to improve the performance.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Avoid using the "low-level" library timing utilities. This is in
preparation for using SysTick as part of the timer implementation.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
The ARM CortexM3 (and later) chips almost always have a 32bit timer in
the "Debug and Watch Trace" (DWT) unit which resides within the cpu
core itself. This timer is generally faster to access than timers
located on the chip's peripheral bus. When combined with the standard
ARM SysTick timer it provides a (generally) portable mechanism to
implement Klipper's software timer mechanism. It's generally also
faster than using the vendor specific timers.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Move the definition of SERIAL_BAUD to the main src/Kconfig file. Only
show this as an option if the user selects the ability to configure
low-level options.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
The lpc176x ADC is extremely noisy. Implement a 5 order median filter
on each ADC read to weed out obviously incorrect readings.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Order the adc config code so that a shutdown from gpio_adc_setup()
doesn't result in analog_in_shutdown() running on a 'struct analog_in'
that hasn't yet been configured.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Make sure to explicitly cast to 32bit integers when doing math on
16bit integers that require the extra precision as the AVR uses a
16bit int.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
The sam3 i2c code and the linux code use a 7-bit i2c address, while
the avr, lpc176x, and samd21 i2c code uses an 8-bit address with the
least significant bit always zero. A similar issue occurred in the
host code (sx1509.py and replicape.py use 7-bit addresses while
uc1701.py and mcp4451.py use 8-bit addresses).
Consistently use 7-bit addresses in all the code. This breaks
compatibility between host and mcu software, so make a change to the
config_i2c command to force users to synchronize software updates.
This also breaks common Smoothieboard configs, so update the mcp4451
code to validate the i2c_address.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Most of the peripherals on the sam4e8e are similar to the ones on the
sam3x8e mcu. Merge the code together and use just one code directory.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Remove the 'pin' and 'afec' variables from 'struct gpio_adc'. This is
in preparation to merge the sam3x8e and sam4e8e code.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Use internal.h in a similar way to the internal.h in sam3x8e. Also,
move the twi pin definitions from internal.h to i2c.c (as they are only
used there).
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
These two files from atmel have different licenses than the other
files. Neither files provide any real value, so just remove them to
avoid any confusion.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Pass the gpio id instead of the bank/pin to gpio_peripheral(). This
is in keeping with other ARM ports.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Scale the bus speed within the peripheral instead of on the system bus
as scaling on the system bus slows down general register access to the
peripheral.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Simultaneously define the hardware pin and the timer registers. This
makes the table a little easier to understand.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Increase the amount of time to "busy wait" in the timer dispatch loop
to 2 micro-seconds. This, in practice, causes stepper step and unstep
events to occur within a single hardware interrupt. Doing that helps
stabilize the single active stepper performance benchmarks.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
The atmega328p is basically the same as the atmega328 - add explicit
support for it so that avrdude doesn't complain while flashing.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Sometime bossac reports an error during chip restart. It appears this
error is spurious - just suppress it.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Scaling the timer on the system bus has a notable impact on
performance. So, scale the timer within the timer hardware itself.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
It appears the sam3x8e has a primitive cache prefetch mechanism (it
prefetches 32 bytes at a time aligned to a 16 byte boundary).
Aligning the main loop in timer_dispatch_many() to a 16 byte boundary
significantly improves performance.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
If sched_try_shutdown() is not inlined into timer_dispatch_many() it
can have a significant impact on benchmarks. (Even though the
function isn't called in practice, the call causes gcc to organize the
function differently.)
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Some older versions of gcc need the __always_inline directive in order
to inline timer_read_time. Inlining that function is important for
performance on the stm32f1.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
As long as timer_read_time() is inlined, I get better performance with
gcc -O2 optimization. The binary is also dramatically smaller and O2
better matches the other platforms.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Kevin O'Connor