stm32: Simplify setting of 12bit mode on stm32h7 in stm32h7_adc.c
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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@ -19,7 +19,6 @@
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#define RCC_AHBENR_ADCEN (RCC_AHB1ENR_ADC12EN)
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#define ADC_CKMODE (0b11)
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#define ADC_ATICKS (0b101)
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#define ADC_RES (0b110)
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#define ADC_TS (ADC3_COMMON)
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#if CONFIG_MACH_STM32H723
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#define PCSEL PCSEL_RES0
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@ -30,7 +29,6 @@
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#define RCC_AHBENR_ADCEN (RCC_AHB2ENR_ADCEN)
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#define ADC_CKMODE (0)
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#define ADC_ATICKS (0b100)
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#define ADC_RES (0b00)
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#define ADC_TS (ADC12_COMMON)
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#elif CONFIG_MACH_STM32G4
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#define ADCIN_BANK_SIZE (19)
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@ -38,7 +36,6 @@
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#define RCC_AHBENR_ADCEN (RCC_AHB2ENR_ADC12EN)
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#define ADC_CKMODE (0b11)
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#define ADC_ATICKS (0b100)
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#define ADC_RES (0b00)
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#define ADC_TS (ADC12_COMMON)
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#define ADC_CCR_TSEN (ADC_CCR_VSENSESEL)
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#endif
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@ -231,13 +228,6 @@ gpio_adc_setup(uint32_t pin)
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// Enable the ADC
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if (!(adc->CR & ADC_CR_ADEN)) {
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// STM32H723 ADC3 and ADC1/2 registers are slightly different
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uint8_t is_stm32h723_adc3 = 0;
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#if CONFIG_MACH_STM32H723
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if (adc == ADC3) {
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is_stm32h723_adc3 = 1;
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}
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#endif
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// Pwr
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// Exit deep power down
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MODIFY_REG(adc->CR, ADC_CR_DEEPPWD_Msk, 0);
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@ -287,10 +277,11 @@ gpio_adc_setup(uint32_t pin)
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| (aticks << 18) | (aticks << 21) | (aticks << 24)
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| (aticks << 27));
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// Set to 12 bit
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if (!is_stm32h723_adc3) {
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MODIFY_REG(adc->CFGR, ADC_CFGR_RES_Msk, ADC_RES<<ADC_CFGR_RES_Pos);
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}
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// The stm32h7 chips need to be set to 12bit samples
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#if CONFIG_MACH_STM32H7
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if (!(CONFIG_MACH_STM32H723 && adc == ADC3))
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adc->CFGR = ADC_CFGR_JQDIS | (0b110 << ADC_CFGR_RES_Pos);
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#endif
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}
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if (pin == ADC_TEMPERATURE_PIN) {
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