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stm32: Support for STM32F401 (#3853) 

This module adds support for the STM32F401 microcontrollers

Signed-off-by: Marco D'Alessio <marco@wrecklab.com>
This commit is contained in:
smark- 2021-02-01 01:41:53 +01:00 committed by GitHub
parent 60e4cddf36
commit ef4d9c3abd
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GPG Key ID: 4AEE18F83AFDEB23
3 changed files with 17 additions and 9 deletions
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17
src/stm32/Kconfig
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@ -25,6 +25,9 @@ choice
config MACH_STM32F207
bool "STM32F207"
select MACH_STM32F2
config MACH_STM32F401
bool "STM32F401"
select MACH_STM32F4
config MACH_STM32F405
bool "STM32F405"
select MACH_STM32F4
@ -65,6 +68,7 @@ config MCU
default "stm32f070xb" if MACH_STM32F070
default "stm32f103xe" if MACH_STM32F103
default "stm32f207xx" if MACH_STM32F207
default "stm32f401xc" if MACH_STM32F401
default "stm32f405xx" if MACH_STM32F405
default "stm32f407xx" if MACH_STM32F407
default "stm32f446xx" if MACH_STM32F446
@ -75,6 +79,7 @@ config CLOCK_FREQ
default 64000000 if MACH_STM32F103 && STM32_CLOCK_REF_INTERNAL
default 72000000 if MACH_STM32F103
default 120000000 if MACH_STM32F207
default 84000000 if MACH_STM32F401
default 168000000 if MACH_STM32F405 || MACH_STM32F407
default 180000000 if MACH_STM32F446
@ -83,8 +88,8 @@ config FLASH_SIZE
default 0x8000 if MACH_STM32F042
default 0x20000 if MACH_STM32F070
default 0x10000 if MACH_STM32F103 # Flash size of stm32f103x8 (64KiB)
default 0x40000 if MACH_STM32F2
default 0x80000 if MACH_STM32F4
default 0x40000 if MACH_STM32F2 || MACH_STM32F401
default 0x80000 if MACH_STM32F405 || MACH_STM32F407 || MACH_STM32F446
config RAM_START
hex
@ -96,7 +101,9 @@ config RAM_SIZE
default 0x4000 if MACH_STM32F070
default 0x5000 if MACH_STM32F103 # Ram size of stm32f103x8 (20KiB)
default 0x20000 if MACH_STM32F207
default 0x20000 if MACH_STM32F4
default 0x10000 if MACH_STM32F401
default 0x20000 if MACH_STM32F405 || MACH_STM32F407 || MACH_STM32F446
config STACK_SIZE
int
@ -184,7 +191,7 @@ choice
config CAN_PINS_PB5_PB6
bool "Pins PB5(rx) and PB6(tx)" if MACH_STM32F4
config CAN_PINS_PB12_PB13
bool "Pins PB12(rx) and PB13(tx)" if MACH_STM32F4
bool "Pins PB12(rx) and PB13(tx)" if MACH_STM32F405 || MACH_STM32F407
endchoice
config STM32F0_TRIM
@ -221,7 +228,7 @@ choice
config STM32_SERIAL_USART3
bool "USART3"
config STM32_SERIAL_USART3_ALT
bool "USART3 (on PD9/PD8)" if MACH_STM32F4
bool "USART3 (on PD9/PD8)" if MACH_STM32F405 || MACH_STM32F407
endchoice
config SERIAL_PORT
int

4
src/stm32/adc.c
View File

@ -83,7 +83,7 @@ gpio_adc_setup(uint32_t pin)
// Determine which ADC block to use
ADC_TypeDef *adc = ADC1;
uint32_t adc_base = ADC1_BASE;
#if CONFIG_MACH_STM32F4
#if CONFIG_MACH_STM32F405 || CONFIG_MACH_STM32F407
if (chan >= 19) {
// On the STM32F4, some ADC channels are only available from ADC3
adc = ADC3;
@ -108,7 +108,7 @@ gpio_adc_setup(uint32_t pin)
}
if (pin == ADC_TEMPERATURE_PIN) {
#if !CONFIG_MACH_STM32F1
#if !(CONFIG_MACH_STM32F1 || CONFIG_MACH_STM32F401)
ADC123_COMMON->CCR = ADC_CCR_TSVREFE;
#endif
} else {

5
src/stm32/stm32f4.c
View File

@ -143,7 +143,7 @@ enable_clock_stm32f20x(void)
static void
enable_clock_stm32f40x(void)
{
#if CONFIG_MACH_STM32F405 || CONFIG_MACH_STM32F407
#if CONFIG_MACH_STM32F405 || CONFIG_MACH_STM32F407 || CONFIG_MACH_STM32F401
uint32_t pll_base = 2000000, pll_freq = CONFIG_CLOCK_FREQ * 2, pllcfgr;
if (!CONFIG_STM32_CLOCK_REF_INTERNAL) {
// Configure 168Mhz PLL from external crystal (HSE)
@ -218,7 +218,8 @@ clock_setup(void)
// Configure and enable PLL
if (CONFIG_MACH_STM32F207)
enable_clock_stm32f20x();
else if (CONFIG_MACH_STM32F405 || CONFIG_MACH_STM32F407)
else if (CONFIG_MACH_STM32F405 || CONFIG_MACH_STM32F407
|| CONFIG_MACH_STM32F401)
enable_clock_stm32f40x();
else
enable_clock_stm32f446();