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stm32f1: Fix ADC (#1474) 

The sampling time of the ADC was too slow (239 ADC clock cycles), causing the reading of the next ADC channel to have cross talk as per issue #1261. Sampling time updated to 41 ADC clock cycles.

Signed-off-by: Marco D'Alessio <marco@wrecklab.com>
This commit is contained in:
smark- 2019-03-31 20:32:27 +02:00 committed by KevinOConnor
parent d1eefba453
commit eedc773d69
1 changed files with 1 additions and 1 deletions
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2
src/stm32f1/adc.c
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@ -76,7 +76,7 @@ gpio_adc_sample(struct gpio_adc g)
if (!readb(&adc_busy)) {
LL_ADC_REG_SetSequencerRanks(ADC1, LL_ADC_REG_RANK_1, g.bit);
LL_ADC_SetChannelSamplingTime(ADC1, g.bit
, LL_ADC_SAMPLINGTIME_239CYCLES_5);
, LL_ADC_SAMPLINGTIME_41CYCLES_5);
LL_ADC_REG_StartConversionSWStart(ADC1);
adc_busy = true;
adc_current_channel = g.bit;