From eec58b99fe46f5886a91039e0e7ca515a4154f40 Mon Sep 17 00:00:00 2001 From: Kevin O'Connor Date: Mon, 20 Aug 2018 16:52:43 -0400 Subject: [PATCH] sam4e8e: Add support for gpio_x_reset() Signed-off-by: Kevin O'Connor --- src/sam4e8e/gpio.c | 68 +++++++++++++++++++++++++--------------------- src/sam4e8e/gpio.h | 8 ++++-- 2 files changed, 42 insertions(+), 34 deletions(-) diff --git a/src/sam4e8e/gpio.c b/src/sam4e8e/gpio.c index d08e92a6..6f736b65 100644 --- a/src/sam4e8e/gpio.c +++ b/src/sam4e8e/gpio.c @@ -74,29 +74,33 @@ gpio_out_setup(uint8_t pin, uint8_t val) goto fail; uint32_t port = GPIO2PORT(pin); Pio *regs = digital_regs[port]; - uint32_t bit = GPIO2BIT(pin); uint32_t bank_id = ID_PIOA + port; - - irqstatus_t flag = irq_save(); - if ((PMC->PMC_PCSR0 & (1u << bank_id)) == 0) { PMC->PMC_PCER0 = 1 << bank_id; } - - if (val) - regs->PIO_SODR = bit; - else - regs->PIO_CODR = bit; - regs->PIO_OER = bit; - regs->PIO_OWER = bit; - regs->PIO_PER = bit; - - irq_restore(flag); - return (struct gpio_out){ .pin=pin, .regs=regs, .bit=bit }; + struct gpio_out g = { .regs=regs, .bit=GPIO2BIT(pin) }; + gpio_out_reset(g, val); + return g; fail: shutdown("Not an output pin"); } +void +gpio_out_reset(struct gpio_out g, uint8_t val) +{ + Pio *regs = g.regs; + irqstatus_t flag = irq_save(); + if (val) + regs->PIO_SODR = g.bit; + else + regs->PIO_CODR = g.bit; + regs->PIO_OER = g.bit; + regs->PIO_OWER = g.bit; + regs->PIO_PER = g.bit; + regs->PIO_PUDR = g.bit; + irq_restore(flag); +} + void gpio_out_toggle_noirq(struct gpio_out g) { @@ -129,30 +133,32 @@ gpio_in_setup(uint8_t pin, int8_t pull_up) goto fail; uint32_t port = GPIO2PORT(pin); Pio *regs = digital_regs[port]; - uint32_t bit = GPIO2BIT(pin); uint32_t bank_id = ID_PIOA + port; - - regs->PIO_IDR = bit; - irqstatus_t flag = irq_save(); - if ((PMC->PMC_PCSR0 & (1u << bank_id)) == 0) { PMC->PMC_PCER0 = 1 << bank_id; } - - if (pull_up) - regs->PIO_PUER = bit; - else - regs->PIO_PUDR = bit; - - regs->PIO_ODR = bit; - regs->PIO_PER = bit; - - irq_restore(flag); - return (struct gpio_in){ .pin=pin, .regs=regs, .bit=bit }; + struct gpio_in g = { .regs=regs, .bit=GPIO2BIT(pin) }; + gpio_in_reset(g, pull_up); + return g; fail: shutdown("Not an input pin"); } +void +gpio_in_reset(struct gpio_in g, int8_t pull_up) +{ + Pio *regs = g.regs; + irqstatus_t flag = irq_save(); + regs->PIO_IDR = g.bit; + if (pull_up) + regs->PIO_PUER = g.bit; + else + regs->PIO_PUDR = g.bit; + regs->PIO_ODR = g.bit; + regs->PIO_PER = g.bit; + irq_restore(flag); +} + uint8_t gpio_in_read(struct gpio_in g) { diff --git a/src/sam4e8e/gpio.h b/src/sam4e8e/gpio.h index 9855d30d..2ac13008 100644 --- a/src/sam4e8e/gpio.h +++ b/src/sam4e8e/gpio.h @@ -11,6 +11,7 @@ struct gpio_out { void gpio_set_peripheral(char bank, uint32_t bit, char ptype, uint32_t pull_up); struct gpio_out gpio_out_setup(uint8_t pin, uint8_t val); +void gpio_out_reset(struct gpio_out g, uint8_t val); void gpio_out_toggle_noirq(struct gpio_out g); void gpio_out_toggle(struct gpio_out g); void gpio_out_write(struct gpio_out g, uint8_t val); @@ -21,15 +22,16 @@ struct gpio_in { uint32_t bit; }; +struct gpio_in gpio_in_setup(uint8_t pin, int8_t pull_up); +void gpio_in_reset(struct gpio_in g, int8_t pull_up); +uint8_t gpio_in_read(struct gpio_in g); + struct gpio_adc { uint8_t pin; void *afec; uint32_t chan; }; -struct gpio_in gpio_in_setup(uint8_t pin, int8_t pull_up); -uint8_t gpio_in_read(struct gpio_in g); - struct gpio_adc gpio_pin_to_afec(uint8_t pin); struct gpio_adc gpio_adc_setup(uint8_t pin); uint32_t gpio_adc_sample(struct gpio_adc g);