stm32: Add STM32F429 variant (#3926)
* Add F429 variant; add CAN on PD0,PD1; add 25Mhx clock; move CAN1_RX from PI8 to correct position (PI9) * Add test for STM32F429 Signed-off-by: Arkadiusz Raj <arek.raj@gmail.com>
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@ -34,6 +34,9 @@ choice
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config MACH_STM32F407
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bool "STM32F407"
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select MACH_STM32F4
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config MACH_STM32F429
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bool "STM32F429"
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select MACH_STM32F4
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config MACH_STM32F446
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bool "STM32F446"
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select MACH_STM32F4
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@ -75,6 +78,7 @@ config MCU
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default "stm32f401xc" if MACH_STM32F401
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default "stm32f405xx" if MACH_STM32F405
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default "stm32f407xx" if MACH_STM32F407
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default "stm32f429xx" if MACH_STM32F429
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default "stm32f446xx" if MACH_STM32F446
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config CLOCK_FREQ
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@ -85,7 +89,7 @@ config CLOCK_FREQ
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default 120000000 if MACH_STM32F207
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default 84000000 if MACH_STM32F401
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default 168000000 if MACH_STM32F405 || MACH_STM32F407
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default 180000000 if MACH_STM32F446
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default 180000000 if MACH_STM32F446 || MACH_STM32F429
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config FLASH_SIZE
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hex
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@ -94,7 +98,7 @@ config FLASH_SIZE
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default 0x20000 if MACH_STM32F070
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default 0x10000 if MACH_STM32F103 # Flash size of stm32f103x8 (64KiB)
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default 0x40000 if MACH_STM32F2 || MACH_STM32F401
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default 0x80000 if MACH_STM32F405 || MACH_STM32F407 || MACH_STM32F446
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default 0x80000 if MACH_STM32F405 || MACH_STM32F407 || MACH_STM32F429 || MACH_STM32F446
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config RAM_START
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hex
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@ -108,8 +112,7 @@ config RAM_SIZE
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default 0x5000 if MACH_STM32F103 # Ram size of stm32f103x8 (20KiB)
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default 0x20000 if MACH_STM32F207
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default 0x10000 if MACH_STM32F401
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default 0x20000 if MACH_STM32F405 || MACH_STM32F407 || MACH_STM32F446
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default 0x20000 if MACH_STM32F405 || MACH_STM32F407 || MACH_STM32F429 || MACH_STM32F446
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config STACK_SIZE
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int
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@ -163,11 +166,14 @@ choice
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bool "12 MHz crystal"
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config STM32_CLOCK_REF_16M
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bool "16 MHz crystal"
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config STM32_CLOCK_REF_25M
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bool "25 MHz crystal"
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config STM32_CLOCK_REF_INTERNAL
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bool "Internal clock"
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endchoice
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config CLOCK_REF_FREQ
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int
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default 25000000 if STM32_CLOCK_REF_25M
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default 16000000 if STM32_CLOCK_REF_16M
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default 12000000 if STM32_CLOCK_REF_12M
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default 1 if STM32_CLOCK_REF_INTERNAL
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@ -193,11 +199,13 @@ choice
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config CAN_PINS_PB8_PB9
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bool "Pins PB8(rx) and PB9(tx)"
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config CAN_PINS_PI8_PH13
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bool "Pins PI8(rx) and PH13(tx)" if MACH_STM32F4
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bool "Pins PI9(rx) and PH13(tx)" if MACH_STM32F4
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config CAN_PINS_PB5_PB6
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bool "Pins PB5(rx) and PB6(tx)" if MACH_STM32F4
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config CAN_PINS_PB12_PB13
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bool "Pins PB12(rx) and PB13(tx)" if MACH_STM32F405 || MACH_STM32F407
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bool "Pins PB12(rx) and PB13(tx)" if MACH_STM32F4
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config CAN_PINS_PD0_PD1
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bool "Pins PD0(rx) and PD1(tx)" if MACH_STM32F4
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endchoice
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config STM32F0_TRIM
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@ -28,8 +28,8 @@
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#define GPIO_Tx GPIO('B', 9)
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#endif
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#if CONFIG_CAN_PINS_PI8_PH13
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DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PI8,PH13");
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#define GPIO_Rx GPIO('I', 8)
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DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PI9,PH13");
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#define GPIO_Rx GPIO('I', 9)
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#define GPIO_Tx GPIO('H', 13)
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#endif
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#if CONFIG_CAN_PINS_PB5_PB6
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@ -42,6 +42,11 @@
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#define GPIO_Rx GPIO('B', 12)
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#define GPIO_Tx GPIO('B', 13)
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#endif
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#if CONFIG_CAN_PINS_PD0_PD1
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DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PD0,PD1");
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#define GPIO_Rx GPIO('D', 0)
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#define GPIO_Tx GPIO('D', 1)
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#endif
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#if CONFIG_MACH_STM32F0
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#define SOC_CAN CAN
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@ -64,7 +69,7 @@
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#if CONFIG_MACH_STM32F4
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#warning CAN on STM32F4 is untested
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#if (CONFIG_CAN_PINS_PA11_PA12 || CONFIG_CAN_PINS_PB8_PB9 \
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|| CONFIG_CAN_PINS_PI8_PH13)
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|| CONFIG_CAN_PINS_PD0_PD1 || CONFIG_CAN_PINS_PI9_PH13)
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#define SOC_CAN CAN1
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#define CAN_RX0_IRQn CAN1_RX0_IRQn
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#define CAN_RX1_IRQn CAN1_RX1_IRQn
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@ -0,0 +1,3 @@
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# Base config file for STM32F429 ARM processor
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CONFIG_MACH_STM32=y
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CONFIG_MACH_STM32F429=y
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