From e3beafbdb4f2ac3f889f81aec0cad5ec473c8612 Mon Sep 17 00:00:00 2001
From: Kevin O'Connor <kevin@koconnor.net>
Date: Fri, 11 Mar 2022 14:12:11 -0500
Subject: [PATCH] stm32: Clarify CCIPR2 setting in stm32g0.c

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
---
 src/stm32/stm32g0.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/stm32/stm32g0.c b/src/stm32/stm32g0.c
index d3815328..6cb7c54c 100644
--- a/src/stm32/stm32g0.c
+++ b/src/stm32/stm32g0.c
@@ -95,7 +95,7 @@ clock_setup(void)
         ;
 
     // Use PLLQCLK for USB (setting USBSEL=2 works in practice)
-    RCC->CCIPR2 = RCC_CCIPR2_USBSEL_1;
+    RCC->CCIPR2 = 2 << RCC_CCIPR2_USBSEL_Pos;
 }