stm32g0: add stm32g0b0 support
Signed-off-by: Alex Voinea <voinea.dragos.alexandru@gmail.com>
This commit is contained in:
Alex Voinea
KevinOConnor
parent
9d668d63a7
commit
e33b41abaa
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@ -65,9 +65,14 @@ choice
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bool "STM32F072"
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select MACH_STM32F0
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select MACH_STM32F0x2
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config MACH_STM32G0B0
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bool "STM32G0B0"
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select MACH_STM32G0
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select MACH_STM32G0Bx
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config MACH_STM32G0B1
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bool "STM32G0B1"
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select MACH_STM32G0
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select MACH_STM32G0Bx
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config MACH_STM32G431
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bool "STM32G431"
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select MACH_STM32G4
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@ -99,6 +104,8 @@ config MACH_STM32F4
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bool
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config MACH_STM32G0
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bool
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config MACH_STM32G0Bx
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bool
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config MACH_STM32G4
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bool
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config MACH_STM32H7
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@ -111,7 +118,7 @@ config MACH_STM32L4
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bool
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config HAVE_STM32_USBFS
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bool
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default y if MACH_STM32F0x2 || MACH_STM32G0 || MACH_STM32L4 || MACH_STM32G4
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default y if MACH_STM32F0x2 || MACH_STM32GBx || MACH_STM32L4 || MACH_STM32G4
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default y if (MACH_STM32F103 || MACH_STM32F070) && !STM32_CLOCK_REF_INTERNAL
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config HAVE_STM32_USBOTG
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bool
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@ -121,7 +128,7 @@ config HAVE_STM32_CANBUS
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default y if MACH_STM32F1 || MACH_STM32F2 || MACH_STM32F4x5 || MACH_STM32F446 || MACH_STM32F0x2
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config HAVE_STM32_FDCANBUS
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bool
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default y if MACH_STM32G0 || MACH_STM32H7 || MACH_STM32G4
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default y if MACH_STM32G0B1 || MACH_STM32H7 || MACH_STM32G4
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config HAVE_STM32_USBCANBUS
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bool
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depends on HAVE_STM32_USBFS || HAVE_STM32_USBOTG
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@ -142,6 +149,7 @@ config MCU
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default "stm32f407xx" if MACH_STM32F407
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default "stm32f429xx" if MACH_STM32F429
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default "stm32f446xx" if MACH_STM32F446
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default "stm32g0b0xx" if MACH_STM32G0B0
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default "stm32g0b1xx" if MACH_STM32G0B1
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default "stm32g431xx" if MACH_STM32G431
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default "stm32h723xx" if MACH_STM32H723
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@ -171,7 +179,7 @@ config FLASH_SIZE
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default 0x10000 if MACH_STM32F103 || MACH_STM32L412 # Flash size of stm32f103x8 (64KiB)
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default 0x40000 if MACH_STM32F2 || MACH_STM32F401 || MACH_STM32H723
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default 0x80000 if MACH_STM32F4x5 || MACH_STM32F446
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default 0x20000 if MACH_STM32G0B1 || MACH_STM32G431
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default 0x20000 if MACH_STM32G0 || MACH_STM32G431
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default 0x20000 if MACH_STM32H750
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default 0x200000 if MACH_STM32H743
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@ -195,7 +203,7 @@ config RAM_SIZE
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default 0x20000 if MACH_STM32F207
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default 0x10000 if MACH_STM32F401
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default 0x20000 if MACH_STM32F4x5 || MACH_STM32F446
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default 0x24000 if MACH_STM32G0B1
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default 0x24000 if MACH_STM32G0Bx
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default 0x20000 if MACH_STM32H7
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config STACK_SIZE
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@ -87,8 +87,10 @@
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#endif
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#if CONFIG_MACH_STM32G0
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// The stm32g0 has slightly different register names
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// Some of the stm32g0 MCUs have slightly different register names
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#ifdef LPUART2
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#define USART2_IRQn USART2_LPUART2_IRQn
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#endif
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#define USART_CR1_RXNEIE USART_CR1_RXNEIE_RXFNEIE
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#define USART_CR1_TXEIE USART_CR1_TXEIE_TXFNFIE
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#define USART_ISR_RXNE USART_ISR_RXNE_RXFNE
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@ -20,14 +20,17 @@
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****************************************************************/
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// Use 32bit TIM2 timer if available (otherwise use 16bit TIM3 timer)
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#ifdef TIM2
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#if defined(TIM2)
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#define TIMx TIM2
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#define TIMx_IRQn TIM2_IRQn
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#define HAVE_TIMER_32BIT 1
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#else
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#elif defined(TIM3)
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#define TIMx TIM3
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#define TIMx_IRQn TIM3_IRQn
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#define HAVE_TIMER_32BIT 0
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#ifdef TIM4
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#define TIM3_IRQn TIM3_TIM4_IRQn
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#endif
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#endif
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static inline uint32_t
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@ -32,12 +32,16 @@ lookup_clock_line(uint32_t periph_base)
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uint32_t bit = 1 << ((periph_base - AHBPERIPH_BASE) / 0x400);
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return (struct cline){.en=&RCC->AHBENR, .rst=&RCC->AHBRSTR, .bit=bit};
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}
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#if defined(FDCAN1_BASE) || defined(FDCAN2_BASE)
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if ((periph_base == FDCAN1_BASE) || (periph_base == FDCAN2_BASE))
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return (struct cline){.en=&RCC->APBENR1,.rst=&RCC->APBRSTR1,.bit=1<<12};
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#endif
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if (periph_base == USB_BASE)
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return (struct cline){.en=&RCC->APBENR1,.rst=&RCC->APBRSTR1,.bit=1<<13};
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#ifdef CRS_BASE
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if (periph_base == CRS_BASE)
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return (struct cline){.en=&RCC->APBENR1,.rst=&RCC->APBRSTR1,.bit=1<<16};
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#endif
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if (periph_base == I2C3_BASE)
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return (struct cline){.en=&RCC->APBENR1,.rst=&RCC->APBRSTR1,.bit=1<<23};
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if (periph_base == TIM1_BASE)
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@ -56,7 +60,7 @@ lookup_clock_line(uint32_t periph_base)
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return (struct cline){.en=&RCC->APBENR2,.rst=&RCC->APBRSTR2,.bit=1<<18};
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if (periph_base == ADC1_BASE)
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return (struct cline){.en=&RCC->APBENR2,.rst=&RCC->APBRSTR2,.bit=1<<20};
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if (periph_base >= APBPERIPH_BASE && periph_base <= LPTIM1_BASE)
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if (periph_base >= APBPERIPH_BASE && periph_base < APBPERIPH_BASE + 0x8000)
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{
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uint32_t bit = 1 << ((periph_base - APBPERIPH_BASE) / 0x400);
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return (struct cline){.en=&RCC->APBENR1, .rst=&RCC->APBRSTR1, .bit=bit};
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