samd21: Add support for SPI
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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58d61c7887
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@ -7,6 +7,7 @@ config SAMD_SELECT
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default y
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select HAVE_GPIO
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select HAVE_GPIO_I2C
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select HAVE_GPIO_SPI
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select HAVE_GPIO_BITBANGING
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config BOARD_DIRECTORY
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@ -21,6 +21,7 @@ src-y += ../lib/samd21/samd21a/gcc/gcc/startup_samd21.c
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src-$(CONFIG_USBSERIAL) += samd21/usbserial.c generic/usb_cdc.c
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src-$(CONFIG_SERIAL) += samd21/serial.c generic/serial_irq.c
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src-$(CONFIG_HAVE_GPIO_I2C) += samd21/i2c.c
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src-$(CONFIG_HAVE_GPIO_SPI) += samd21/spi.c
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# Support bootloader offset address
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target-y := $(OUT)samd21.ld $(target-y)
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@ -21,6 +21,14 @@ struct gpio_in gpio_in_setup(uint8_t pin, int8_t pull_up);
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void gpio_in_reset(struct gpio_in g, int8_t pull_up);
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uint8_t gpio_in_read(struct gpio_in g);
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struct spi_config {
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uint32_t ctrla, baud;
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};
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struct spi_config spi_setup(uint32_t bus, uint8_t mode, uint32_t rate);
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void spi_prepare(struct spi_config config);
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void spi_transfer(struct spi_config config, uint8_t receive_data
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, uint8_t len, uint8_t *data);
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struct i2c_config {
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uint8_t addr;
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};
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@ -0,0 +1,92 @@
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// spi support on samd21
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//
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// Copyright (C) 2018 Kevin O'Connor <kevin@koconnor.net>
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//
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// This file may be distributed under the terms of the GNU GPLv3 license.
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#include "autoconf.h" // CONFIG_CLOCK_FREQ
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#include "internal.h" // enable_pclock
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#include "command.h" // shutdown
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#include "gpio.h" // spi_setup
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#include "samd21.h" // SERCOM4
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#include "sched.h" // sched_shutdown
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static void
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spi_init(uint32_t ctrla, uint32_t baud)
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{
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static int have_run_init;
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if (have_run_init)
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return;
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have_run_init = 1;
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// Setup clock
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enable_pclock(SERCOM4_GCLK_ID_CORE, PM_APBCMASK_SERCOM4);
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// Configure MISO, MOSI, SCK pins
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gpio_peripheral(GPIO('A', 12), 'D', 0);
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gpio_peripheral(GPIO('B', 10), 'D', 0);
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gpio_peripheral(GPIO('B', 11), 'D', 0);
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// Configure spi
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SercomSpi *ss = &SERCOM4->SPI;
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ss->CTRLA.reg = 0;
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ss->CTRLA.reg = ctrla & ~SERCOM_SPI_CTRLA_ENABLE;
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ss->CTRLB.reg = SERCOM_SPI_CTRLB_RXEN;
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ss->BAUD.reg = baud;
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ss->CTRLA.reg = ctrla;
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}
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struct spi_config
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spi_setup(uint32_t bus, uint8_t mode, uint32_t rate)
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{
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if (bus)
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shutdown("Invalid spi bus");
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uint32_t ctrla = (SERCOM_SPI_CTRLA_MODE_SPI_MASTER
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| (mode << SERCOM_SPI_CTRLA_CPHA_Pos)
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| SERCOM_SPI_CTRLA_DIPO(0)
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| SERCOM_SPI_CTRLA_DOPO(1)
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| SERCOM_SPI_CTRLA_ENABLE);
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uint32_t baud = CONFIG_CLOCK_FREQ / (2 * rate) - 1;
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spi_init(ctrla, baud);
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return (struct spi_config){ .ctrla = ctrla, .baud = baud };
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}
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void
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spi_prepare(struct spi_config config)
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{
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uint32_t ctrla = config.ctrla, baud = config.baud;
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SercomSpi *ss = &SERCOM4->SPI;
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if (ctrla == ss->CTRLA.reg && baud == ss->BAUD.reg)
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return;
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ss->CTRLA.reg = ctrla & ~SERCOM_SPI_CTRLA_ENABLE;
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ss->CTRLA.reg = ctrla & ~SERCOM_SPI_CTRLA_ENABLE;
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ss->BAUD.reg = baud;
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ss->CTRLA.reg = ctrla;
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}
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void
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spi_transfer(struct spi_config config, uint8_t receive_data
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, uint8_t len, uint8_t *data)
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{
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SercomSpi *ss = &SERCOM4->SPI;
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if (receive_data) {
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while (len--) {
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ss->DATA.reg = *data;
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// wait for receive register
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while (!(ss->INTFLAG.reg & SERCOM_SPI_INTFLAG_RXC))
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;
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// get data
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*data++ = ss->DATA.reg;
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}
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} else {
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while (len--) {
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ss->DATA.reg = *data++;
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// wait for receive register
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while (!(ss->INTFLAG.reg & SERCOM_SPI_INTFLAG_RXC))
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;
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// read data (to clear RXC)
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ss->DATA.reg;
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}
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}
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}
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