rp2040: Initial USB support
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
This commit is contained in:
Kevin O'Connor
parent
59fe878241
commit
c5667193c9
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@ -52,6 +52,9 @@ config SERIAL
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bool
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choice
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prompt "Communication interface"
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config RP2040_USB
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bool "USB"
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select USBSERIAL
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config RP2040_SERIAL_UART0
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bool "Serial (on UART0 GPIO1/GPIO0)"
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select SERIAL
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@ -16,6 +16,7 @@ $(OUT)klipper.elf: $(OUT)stage2.o $(OUT)src/rp2040/rp2040_link.ld
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src-y += rp2040/main.c rp2040/gpio.c rp2040/adc.c generic/crc16_ccitt.c
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src-y += generic/armcm_boot.c generic/armcm_irq.c generic/armcm_reset.c
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src-y += generic/timer_irq.c rp2040/timer.c
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src-$(CONFIG_USBSERIAL) += rp2040/usbserial.c generic/usb_cdc.c
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src-$(CONFIG_SERIAL) += rp2040/serial.c generic/serial_irq.c
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# rp2040 stage2 building
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@ -131,9 +131,10 @@ clock_setup(void)
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enable_pclock(RESETS_RESET_PLL_USB_BITS);
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pll_setup(pll_usb_hw, 40, 40*FREQ_XOSC/FREQ_USB);
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// Setup clk_peri and clk_adc
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// Setup peripheral clocks
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clk_aux_setup(clk_peri, CLOCKS_CLK_PERI_CTRL_AUXSRC_VALUE_CLK_SYS);
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clk_aux_setup(clk_adc, CLOCKS_CLK_ADC_CTRL_AUXSRC_VALUE_CLKSRC_PLL_USB);
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clk_aux_setup(clk_usb, CLOCKS_CLK_USB_CTRL_AUXSRC_VALUE_CLKSRC_PLL_USB);
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// Enable watchdog tick (at 12Mhz)
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cref->div = 1<<CLOCKS_CLK_REF_DIV_INT_LSB;
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@ -0,0 +1,235 @@
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// Hardware interface to USB on rp2040
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//
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// Copyright (C) 2021 Kevin O'Connor <kevin@koconnor.net>
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//
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// This file may be distributed under the terms of the GNU GPLv3 license.
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#include <string.h> // memcpy
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#include "board/armcm_boot.h" // armcm_enable_irq
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#include "board/io.h" // writeb
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#include "board/usb_cdc.h" // usb_notify_ep0
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#include "board/usb_cdc_ep.h" // USB_CDC_EP_BULK_IN
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#include "board/usbstd.h" // USB_ENDPOINT_XFER_INT
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#include "hardware/structs/resets.h" // RESETS_RESET_USBCTRL_BITS
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#include "hardware/structs/usb.h" // usb_hw
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#include "internal.h" // enable_pclock
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#include "sched.h" // DECL_INIT
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/****************************************************************
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* USB transfer memory
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****************************************************************/
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#define DPBUF_SIZE 64
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static uint32_t
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usb_buf_offset(uint32_t ep)
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{
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return 0x100 + ep * DPBUF_SIZE * 2;
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}
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static int_fast8_t
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usb_write_packet(uint32_t ep, const void *data, uint_fast8_t len)
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{
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// Check if there is room for this packet
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uint32_t epb = usb_dpram->ep_buf_ctrl[ep].in;
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if (epb & (USB_BUF_CTRL_AVAIL|USB_BUF_CTRL_FULL))
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return -1;
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uint32_t pid = (epb ^ USB_BUF_CTRL_DATA1_PID) & USB_BUF_CTRL_DATA1_PID;
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uint32_t new_epb = USB_BUF_CTRL_FULL | USB_BUF_CTRL_LAST | pid | len;
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usb_dpram->ep_buf_ctrl[ep].in = new_epb;
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// Copy the packet to the hw buffer
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void *addr = (void*)usb_dpram + usb_buf_offset(ep);
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memcpy(addr, data, len);
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// Inform the USB hardware of the available packet
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usb_dpram->ep_buf_ctrl[ep].in = new_epb | USB_BUF_CTRL_AVAIL;
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return len;
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}
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static int_fast8_t
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usb_read_packet(uint32_t ep, void *data, uint_fast8_t max_len)
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{
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// Check if there is a packet ready
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uint32_t epb = usb_dpram->ep_buf_ctrl[ep].out;
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if ((epb & (USB_BUF_CTRL_AVAIL|USB_BUF_CTRL_FULL)) != USB_BUF_CTRL_FULL)
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return -1;
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// Copy the packet to the given buffer
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uint32_t pid = (epb ^ USB_BUF_CTRL_DATA1_PID) & USB_BUF_CTRL_DATA1_PID;
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uint32_t new_epb = USB_BUF_CTRL_LAST | pid | DPBUF_SIZE;
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usb_dpram->ep_buf_ctrl[ep].out = new_epb;
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uint32_t c = epb & USB_BUF_CTRL_LEN_MASK;
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if (c > max_len)
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c = max_len;
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void *addr = (void*)usb_dpram + usb_buf_offset(ep);
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memcpy(data, addr, c);
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// Notify the USB hardware that the space is now available
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usb_dpram->ep_buf_ctrl[ep].out = new_epb | USB_BUF_CTRL_AVAIL;
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return c;
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}
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/****************************************************************
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* Interface
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****************************************************************/
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int_fast8_t
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usb_read_bulk_out(void *data, uint_fast8_t max_len)
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{
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return usb_read_packet(USB_CDC_EP_BULK_OUT, data, max_len);
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}
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int_fast8_t
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usb_send_bulk_in(void *data, uint_fast8_t len)
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{
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return usb_write_packet(USB_CDC_EP_BULK_IN, data, len);
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}
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int_fast8_t
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usb_read_ep0_setup(void *data, uint_fast8_t max_len)
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{
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if (!(usb_hw->intr & USB_INTR_SETUP_REQ_BITS)) {
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usb_hw->inte = USB_INTE_BUFF_STATUS_BITS | USB_INTE_SETUP_REQ_BITS;
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return -1;
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}
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usb_dpram->ep_buf_ctrl[0].in = 0;
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usb_dpram->ep_buf_ctrl[0].out = (USB_BUF_CTRL_DATA1_PID | USB_BUF_CTRL_LAST
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| USB_BUF_CTRL_AVAIL | DPBUF_SIZE);
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usb_hw->sie_status = USB_SIE_STATUS_SETUP_REC_BITS;
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memcpy(data, (void*)usb_dpram->setup_packet, max_len);
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if (usb_hw->intr & USB_INTR_SETUP_REQ_BITS) {
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// Raced with next setup packet
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usb_notify_ep0();
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return -1;
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}
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return max_len;
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}
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int_fast8_t
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usb_read_ep0(void *data, uint_fast8_t max_len)
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{
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if (usb_hw->intr & USB_INTR_SETUP_REQ_BITS)
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// Early end of transmission
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return -2;
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return usb_read_packet(0, data, max_len);
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}
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int_fast8_t
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usb_send_ep0(const void *data, uint_fast8_t len)
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{
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if (usb_hw->intr & USB_INTR_SETUP_REQ_BITS || usb_hw->buf_status & 2)
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// Early end of transmission
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return -2;
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return usb_write_packet(0, data, len);
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}
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void
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usb_stall_ep0(void)
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{
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usb_dpram->ep_buf_ctrl[0].in = 0;
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usb_dpram->ep_buf_ctrl[0].out = 0;
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usb_hw->ep_stall_arm = USB_EP_STALL_ARM_BITS;
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usb_dpram->ep_buf_ctrl[0].in = USB_BUF_CTRL_STALL;
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usb_dpram->ep_buf_ctrl[0].out = USB_BUF_CTRL_STALL;
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usb_notify_ep0();
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}
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static uint8_t set_address;
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void
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usb_set_address(uint_fast8_t addr)
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{
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writeb(&set_address, addr);
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usb_send_ep0(NULL, 0);
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}
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void
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usb_set_configure(void)
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{
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usb_dpram->ep_buf_ctrl[USB_CDC_EP_BULK_IN].in = USB_BUF_CTRL_DATA1_PID;
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usb_dpram->ep_buf_ctrl[USB_CDC_EP_BULK_OUT].out = (
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USB_BUF_CTRL_AVAIL | USB_BUF_CTRL_LAST | DPBUF_SIZE);
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}
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void
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usb_request_bootloader(void)
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{
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// XXX
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}
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/****************************************************************
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* Setup and interrupts
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****************************************************************/
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void
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USB_Handler(void)
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{
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uint32_t ints = usb_hw->ints;
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if (ints & USB_INTS_SETUP_REQ_BITS) {
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usb_hw->inte = USB_INTE_BUFF_STATUS_BITS;
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usb_notify_ep0();
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}
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if (ints & USB_INTS_BUFF_STATUS_BITS) {
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uint32_t buf_status = usb_hw->buf_status;
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usb_hw->buf_status = buf_status;
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if (buf_status & (1 << (USB_CDC_EP_BULK_OUT*2 + 1)))
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usb_notify_bulk_out();
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if (buf_status & (1 << (USB_CDC_EP_BULK_IN*2)))
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usb_notify_bulk_in();
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if (buf_status & 3) {
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usb_notify_ep0();
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if (buf_status & 1 && set_address) {
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usb_hw->dev_addr_ctrl = set_address;
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set_address = 0;
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}
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}
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}
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}
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static void
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endpoint_setup(void)
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{
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// ACM
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uint32_t ep_acm = (EP_CTRL_ENABLE_BITS | usb_buf_offset(USB_CDC_EP_ACM)
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| (USB_ENDPOINT_XFER_INT << EP_CTRL_BUFFER_TYPE_LSB));
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usb_dpram->ep_ctrl[USB_CDC_EP_ACM-1].in = ep_acm;
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// BULK
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uint32_t ep_out = (EP_CTRL_ENABLE_BITS | usb_buf_offset(USB_CDC_EP_BULK_OUT)
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| EP_CTRL_INTERRUPT_PER_BUFFER
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| (USB_ENDPOINT_XFER_BULK << EP_CTRL_BUFFER_TYPE_LSB));
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usb_dpram->ep_ctrl[USB_CDC_EP_BULK_OUT-1].out = ep_out;
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uint32_t ep_in = (EP_CTRL_ENABLE_BITS | usb_buf_offset(USB_CDC_EP_BULK_IN)
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| EP_CTRL_INTERRUPT_PER_BUFFER
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| (USB_ENDPOINT_XFER_BULK << EP_CTRL_BUFFER_TYPE_LSB));
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usb_dpram->ep_ctrl[USB_CDC_EP_BULK_IN-1].in = ep_in;
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usb_dpram->ep_buf_ctrl[USB_CDC_EP_BULK_IN].in = USB_BUF_CTRL_FULL;
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}
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void
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usbserial_init(void)
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{
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// Configure usb clock
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enable_pclock(RESETS_RESET_USBCTRL_BITS);
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// Setup shared memory area
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memset(usb_dpram, 0, sizeof(*usb_dpram));
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endpoint_setup();
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// Enable USB in device mode
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usb_hw->muxing = USB_USB_MUXING_TO_PHY_BITS | USB_USB_MUXING_SOFTCON_BITS;
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usb_hw->pwr = (USB_USB_PWR_VBUS_DETECT_BITS
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| USB_USB_PWR_VBUS_DETECT_OVERRIDE_EN_BITS);
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usb_hw->main_ctrl = USB_MAIN_CTRL_CONTROLLER_EN_BITS;
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// Enable irqs
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usb_hw->sie_ctrl = USB_SIE_CTRL_EP0_INT_1BUF_BITS;
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usb_hw->inte = USB_INTE_BUFF_STATUS_BITS | USB_INTE_SETUP_REQ_BITS;
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armcm_enable_irq(USB_Handler, USBCTRL_IRQ_IRQn, 1);
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// Enable USB pullup
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usb_hw->sie_ctrl = (USB_SIE_CTRL_EP0_INT_1BUF_BITS
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| USB_SIE_CTRL_PULLUP_EN_BITS);
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// XXX - errata reset workaround??
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}
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DECL_INIT(usbserial_init);
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