stm32f1: Wrap code to 80 columns
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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796b7ac738
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c3eb976119
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@ -75,7 +75,8 @@ gpio_adc_sample(struct gpio_adc g)
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/* ADC not busy, start conversion */
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if (!readb(&adc_busy)) {
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LL_ADC_REG_SetSequencerRanks(ADC1, LL_ADC_REG_RANK_1, g.bit);
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LL_ADC_SetChannelSamplingTime(ADC1, g.bit, LL_ADC_SAMPLINGTIME_239CYCLES_5);
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LL_ADC_SetChannelSamplingTime(ADC1, g.bit
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, LL_ADC_SAMPLINGTIME_239CYCLES_5);
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LL_ADC_REG_StartConversionSWStart(ADC1);
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adc_busy = true;
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adc_current_channel = g.bit;
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@ -17,7 +17,8 @@
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void
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serial_init(void)
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{
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const uint32_t pclk = __LL_RCC_CALC_PCLK2_FREQ(SystemCoreClock, LL_RCC_GetAPB2Prescaler());
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const uint32_t pclk = __LL_RCC_CALC_PCLK2_FREQ(SystemCoreClock
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, LL_RCC_GetAPB2Prescaler());
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LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
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LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
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@ -35,7 +35,8 @@ static void spi_set_mode(SPI_TypeDef *spi, uint8_t mode)
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static void spi_set_baudrate(SPI_TypeDef *spi, uint32_t rate)
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{
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const uint32_t pclk = __LL_RCC_CALC_PCLK1_FREQ(SystemCoreClock, LL_RCC_GetAPB1Prescaler());
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const uint32_t pclk = __LL_RCC_CALC_PCLK1_FREQ(SystemCoreClock
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, LL_RCC_GetAPB1Prescaler());
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const uint32_t prescaler = pclk / rate;
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uint32_t setting = LL_SPI_BAUDRATEPRESCALER_DIV256;
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