tmc5160: add DRV_CONF Register for TMC5160 (#6154)

In some condition ,“drvstrength 2” does not work. According to page 17, some mosfets need “drvstrength” set to 0 .

From datasheet rev1.15, the DRVSTRENGTH reset default is 0 .  (instead of 2)

Signed-off-by: Albert Lin <vcore85@gmail.com>
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vcore85 2023-04-11 23:43:19 +08:00 committed by GitHub
parent d16adc356b
commit c2b2278a49
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2 changed files with 16 additions and 0 deletions

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@ -3524,6 +3524,10 @@ run_current:
#driver_SEDN: 0 #driver_SEDN: 0
#driver_SEIMIN: 0 #driver_SEIMIN: 0
#driver_SFILT: 0 #driver_SFILT: 0
#driver_DRVSTRENGTH: 0
#driver_BBMCLKS: 4
#driver_BBMTIME: 0
#driver_FILT_ISENSE: 0
# Set the given register during the configuration of the TMC5160 # Set the given register during the configuration of the TMC5160
# chip. This may be used to set custom motor parameters. The # chip. This may be used to set custom motor parameters. The
# defaults for each parameter are next to the parameter name in the # defaults for each parameter are next to the parameter name in the

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@ -105,6 +105,13 @@ Fields["CHOPCONF"] = {
"diss2g": 0x01 << 30, "diss2g": 0x01 << 30,
"diss2vs": 0x01 << 31 "diss2vs": 0x01 << 31
} }
Fields["DRV_CONF"] = {
"bbmtime": 0x1F << 0,
"bbmclks": 0x0F << 8,
"otselect": 0x03 << 16,
"drvstrength": 0x03 << 18,
"filt_isense": 0x03 << 20,
}
Fields["DRV_STATUS"] = { Fields["DRV_STATUS"] = {
"sg_result": 0x3FF << 0, "sg_result": 0x3FF << 0,
"s2vsa": 0x01 << 12, "s2vsa": 0x01 << 12,
@ -352,6 +359,11 @@ class TMC5160:
set_config_field(config, "seimin", 0) set_config_field(config, "seimin", 0)
set_config_field(config, "sgt", 0) set_config_field(config, "sgt", 0)
set_config_field(config, "sfilt", 0) set_config_field(config, "sfilt", 0)
# DRV_CONF
set_config_field(config, "drvstrength", 0)
set_config_field(config, "bbmclks", 4)
set_config_field(config, "bbmtime", 0)
set_config_field(config, "filt_isense", 0)
# IHOLDIRUN # IHOLDIRUN
set_config_field(config, "iholddelay", 6) set_config_field(config, "iholddelay", 6)
# PWMCONF # PWMCONF