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stm32f4: Only enable peripherals once 

Add is_enabled_pclock() and only initialize spi and adc once during
configuration.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
This commit is contained in:
Kevin O'Connor 2019-07-28 17:55:57 -04:00
parent ef0784afe6
commit bc9c8cd7a0
4 changed files with 35 additions and 13 deletions
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20
src/stm32f4/adc.c
View File

@ -34,15 +34,17 @@ gpio_adc_setup(uint32_t pin)
} }
// Enable the ADC // Enable the ADC
enable_pclock(ADC1_BASE); if (!is_enabled_pclock(ADC1_BASE)) {
uint32_t aticks = 3; // 56 adc cycles enable_pclock(ADC1_BASE);
ADC1->SMPR1 = (aticks | (aticks << 3) | (aticks << 6) | (aticks << 9) uint32_t aticks = 3; // 56 adc cycles
| (aticks << 12) | (aticks << 15) | (aticks << 18) ADC1->SMPR1 = (aticks | (aticks << 3) | (aticks << 6) | (aticks << 9)
| (aticks << 21) | (aticks << 24)); | (aticks << 12) | (aticks << 15) | (aticks << 18)
ADC1->SMPR2 = (aticks | (aticks << 3) | (aticks << 6) | (aticks << 9) | (aticks << 21) | (aticks << 24));
| (aticks << 12) | (aticks << 15) | (aticks << 18) ADC1->SMPR2 = (aticks | (aticks << 3) | (aticks << 6) | (aticks << 9)
| (aticks << 21) | (aticks << 24) | (aticks << 27)); | (aticks << 12) | (aticks << 15) | (aticks << 18)
ADC1->CR2 = ADC_CR2_ADON; | (aticks << 21) | (aticks << 24) | (aticks << 27));
ADC1->CR2 = ADC_CR2_ADON;
}
gpio_peripheral(pin, GPIO_ANALOG, 0); gpio_peripheral(pin, GPIO_ANALOG, 0);

17
src/stm32f4/clock.c
View File

@ -28,6 +28,23 @@ enable_pclock(uint32_t periph_base)
} }
} }
// Check if a peripheral clock has been enabled
int
is_enabled_pclock(uint32_t periph_base)
{
if (periph_base < APB2PERIPH_BASE) {
uint32_t pos = (periph_base - APB1PERIPH_BASE) / 0x400;
return RCC->APB1ENR & (1<<pos);
} else if (periph_base < AHB1PERIPH_BASE) {
uint32_t pos = (periph_base - APB2PERIPH_BASE) / 0x400;
return RCC->APB2ENR & (1<<pos);
} else if (periph_base < AHB2PERIPH_BASE) {
uint32_t pos = (periph_base - AHB1PERIPH_BASE) / 0x400;
return RCC->AHB1ENR & (1<<pos);
}
return 0;
}
// Return the frequency of the given peripheral clock // Return the frequency of the given peripheral clock
uint32_t uint32_t
get_pclock_frequency(uint32_t periph_base) get_pclock_frequency(uint32_t periph_base)

1
src/stm32f4/internal.h
View File

@ -14,6 +14,7 @@
#define GPIO_ANALOG 3 #define GPIO_ANALOG 3
void enable_pclock(uint32_t periph_base); void enable_pclock(uint32_t periph_base);
int is_enabled_pclock(uint32_t periph_base);
uint32_t get_pclock_frequency(uint32_t periph_base); uint32_t get_pclock_frequency(uint32_t periph_base);
void clock_setup(void); void clock_setup(void);
void gpio_peripheral(uint32_t gpio, uint32_t mode, int pullup); void gpio_peripheral(uint32_t gpio, uint32_t mode, int pullup);

10
src/stm32f4/spi.c
View File

@ -19,10 +19,12 @@ spi_setup(uint32_t bus, uint8_t mode, uint32_t rate)
shutdown("Invalid spi bus"); shutdown("Invalid spi bus");
// Enable SPI // Enable SPI
enable_pclock(SPI2_BASE); if (!is_enabled_pclock(SPI2_BASE)) {
gpio_peripheral(GPIO('B', 14), GPIO_FUNCTION(5), 1); enable_pclock(SPI2_BASE);
gpio_peripheral(GPIO('B', 15), GPIO_FUNCTION(5), 0); gpio_peripheral(GPIO('B', 14), GPIO_FUNCTION(5), 1);
gpio_peripheral(GPIO('B', 13), GPIO_FUNCTION(5), 0); gpio_peripheral(GPIO('B', 15), GPIO_FUNCTION(5), 0);
gpio_peripheral(GPIO('B', 13), GPIO_FUNCTION(5), 0);
}
// Calculate CR1 register // Calculate CR1 register
uint32_t pclk = get_pclock_frequency(SPI2_BASE); uint32_t pclk = get_pclock_frequency(SPI2_BASE);