stm32: add STM32H723 support
Signed-off-by: Chen.BJ from BigTreeTech chenbj@biqu3d.com Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
This commit is contained in:
bigtreetech
Kevin O'Connor
parent
50b2e2e67e
commit
a42f615881
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@ -74,6 +74,7 @@ class PrinterTemperatureMCU:
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('stm32g0', self.config_stm32g0),
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('stm32g4', self.config_stm32g0),
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('stm32l4', self.config_stm32g0),
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('stm32h723', self.config_stm32h723),
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('stm32h7', self.config_stm32h7),
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('', self.config_unknown)]
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for name, func in cfg_funcs:
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@ -146,6 +147,11 @@ class PrinterTemperatureMCU:
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cal_adc_130 = self.read16(0x1FFF75CA) * 3.0 / (3.3 * 4095.)
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self.slope = (130. - 30.) / (cal_adc_130 - cal_adc_30)
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self.base_temperature = self.calc_base(30., cal_adc_30)
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def config_stm32h723(self):
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cal_adc_30 = self.read16(0x1FF1E820) / 4095.
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cal_adc_130 = self.read16(0x1FF1E840) / 4095.
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self.slope = (130. - 30.) / (cal_adc_130 - cal_adc_30)
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self.base_temperature = self.calc_base(30., cal_adc_30)
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def config_stm32h7(self):
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cal_adc_30 = self.read16(0x1FF1E820) / 65535.
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cal_adc_110 = self.read16(0x1FF1E840) / 65535.
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@ -71,6 +71,9 @@ choice
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config MACH_STM32G431
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bool "STM32G431"
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select MACH_STM32G4
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config MACH_STM32H723
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bool "STM32H723"
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select MACH_STM32H7
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config MACH_STM32H743
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bool "STM32H743"
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select MACH_STM32H7
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@ -141,6 +144,7 @@ config MCU
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default "stm32f446xx" if MACH_STM32F446
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default "stm32g0b1xx" if MACH_STM32G0B1
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default "stm32g431xx" if MACH_STM32G431
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default "stm32h723xx" if MACH_STM32H723
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default "stm32h743xx" if MACH_STM32H743
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default "stm32h750xx" if MACH_STM32H750
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default "stm32l412xx" if MACH_STM32L412
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@ -165,7 +169,7 @@ config FLASH_SIZE
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default 0x8000 if MACH_STM32F042
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default 0x20000 if MACH_STM32F070 || MACH_STM32F072
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default 0x10000 if MACH_STM32F103 || MACH_STM32L412 # Flash size of stm32f103x8 (64KiB)
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default 0x40000 if MACH_STM32F2 || MACH_STM32F401
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default 0x40000 if MACH_STM32F2 || MACH_STM32F401 || MACH_STM32H723
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default 0x80000 if MACH_STM32F4x5 || MACH_STM32F446
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default 0x20000 if MACH_STM32G0B1 || MACH_STM32G431
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default 0x20000 if MACH_STM32H750
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@ -239,7 +243,7 @@ choice
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config STM32_FLASH_START_4000
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bool "16KiB bootloader (HID Bootloader)" if MACH_STM32F207 || MACH_STM32F401 || MACH_STM32F4x5 || MACH_STM32F103 || MACH_STM32F072
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config STM32_FLASH_START_20000
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bool "128KiB bootloader (SKR SE BX v2.0)" if MACH_STM32H743
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bool "128KiB bootloader (SKR SE BX v2.0)" if MACH_STM32H743 || MACH_STM32H723
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config STM32_FLASH_START_0000
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bool "No bootloader"
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@ -318,7 +322,7 @@ choice
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select USBSERIAL
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config STM32_USB_PB14_PB15
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bool "USB (on PB14/PB15)"
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depends on MACH_STM32H7
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depends on MACH_STM32H743 || MACH_STM32H750
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select USBSERIAL
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config STM32_SERIAL_USART1
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bool "Serial (on USART1 PA10/PA9)"
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@ -83,10 +83,11 @@ DECL_CONSTANT_STR("RESERVE_PINS_crystal", "PH0,PH1");
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static void
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clock_setup(void)
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{
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#if !CONFIG_MACH_STM32H723
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// Ensure USB OTG ULPI is not enabled
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CLEAR_BIT(RCC->AHB1ENR, RCC_AHB1ENR_USB2OTGHSULPIEN);
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CLEAR_BIT(RCC->AHB1LPENR, RCC_AHB1LPENR_USB2OTGHSULPILPEN);
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#endif
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// Set this despite correct defaults.
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// "The software has to program the supply configuration in PWR control
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// register 3" (pg. 259)
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@ -143,7 +144,11 @@ clock_setup(void)
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// Enable VOS0 (overdrive)
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if (CONFIG_CLOCK_FREQ > 400000000) {
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RCC->APB4ENR |= RCC_APB4ENR_SYSCFGEN;
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#if !CONFIG_MACH_STM32H723
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SYSCFG->PWRCR |= SYSCFG_PWRCR_ODEN;
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#else
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PWR->CR3 |= PWR_CR3_BYPASS;
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#endif
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while (!(PWR->D3CR & PWR_D3CR_VOSRDY))
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;
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}
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@ -14,47 +14,50 @@
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#include "sched.h" // sched_shutdown
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#if CONFIG_MACH_STM32H7
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#define ADCIN_BANK_SIZE (20)
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#define RCC_AHBENR_ADC (RCC->AHB1ENR)
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#define RCC_AHBENR_ADCEN (RCC_AHB1ENR_ADC12EN)
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#define ADC_CKMODE (0b11)
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#define ADC_ATICKS (0b101)
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#define ADC_RES (0b110)
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#define ADC_TS (ADC3_COMMON)
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#define ADCIN_BANK_SIZE (20)
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#define RCC_AHBENR_ADC (RCC->AHB1ENR)
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#define RCC_AHBENR_ADCEN (RCC_AHB1ENR_ADC12EN)
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#define ADC_CKMODE (0b11)
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#define ADC_ATICKS (0b101)
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#define ADC_RES (0b110)
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#define ADC_TS (ADC3_COMMON)
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#if CONFIG_MACH_STM32H723
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#define PCSEL PCSEL_RES0
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#endif
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// Number of samples is 2^OVERSAMPLES_EXPONENT (exponent can be 0-10)
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#define OVERSAMPLES_EXPONENT 3
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#define OVERSAMPLES (1 << OVERSAMPLES_EXPONENT)
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#define ADC_MEAS_DELAY (1 + 2.3666*OVERSAMPLES)
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// Number of samples is 2^OVERSAMPLES_EXPONENT (exponent can be 0-10)
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#define OVERSAMPLES_EXPONENT 3
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#define OVERSAMPLES (1 << OVERSAMPLES_EXPONENT)
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#define ADC_MEAS_DELAY (1 + 2.3666*OVERSAMPLES)
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// LDORDY registers are missing from CMSIS (only available on revision V!)
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#define ADC_ISR_LDORDY_Pos (12U)
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#define ADC_ISR_LDORDY_Msk (0x1UL << ADC_ISR_LDORDY_Pos)
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#define ADC_ISR_LDORDY ADC_ISR_LDORDY_Msk
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// LDORDY registers are missing from CMSIS (only available on revision V!)
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#define ADC_ISR_LDORDY_Pos (12U)
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#define ADC_ISR_LDORDY_Msk (0x1UL << ADC_ISR_LDORDY_Pos)
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#define ADC_ISR_LDORDY ADC_ISR_LDORDY_Msk
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#elif CONFIG_MACH_STM32L4
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#define RCC_AHBENR_ADC (RCC->AHB2ENR)
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#define RCC_AHBENR_ADCEN (RCC_AHB2ENR_ADCEN)
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#define ADC_CKMODE (0)
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#define ADC_ATICKS (0b100)
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#define ADC_RES (0b00)
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#define ADC_TS (ADC12_COMMON)
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#define RCC_AHBENR_ADC (RCC->AHB2ENR)
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#define RCC_AHBENR_ADCEN (RCC_AHB2ENR_ADCEN)
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#define ADC_CKMODE (0)
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#define ADC_ATICKS (0b100)
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#define ADC_RES (0b00)
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#define ADC_TS (ADC12_COMMON)
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#define OVERSAMPLES (0)
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#define ADC_MEAS_DELAY (10)
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#define OVERSAMPLES (0)
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#define ADC_MEAS_DELAY (10)
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#elif CONFIG_MACH_STM32G4
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#define ADCIN_BANK_SIZE (19)
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#define RCC_AHBENR_ADC (RCC->AHB2ENR)
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#define RCC_AHBENR_ADCEN (RCC_AHB2ENR_ADC12EN)
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#define ADC_CKMODE (0b11)
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#define ADC_ATICKS (0b100)
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#define ADC_RES (0b00)
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#define ADC_TS (ADC12_COMMON)
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#define ADC_CCR_TSEN (ADC_CCR_VSENSESEL)
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#define ADCIN_BANK_SIZE (19)
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#define RCC_AHBENR_ADC (RCC->AHB2ENR)
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#define RCC_AHBENR_ADCEN (RCC_AHB2ENR_ADC12EN)
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#define ADC_CKMODE (0b11)
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#define ADC_ATICKS (0b100)
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#define ADC_RES (0b00)
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#define ADC_TS (ADC12_COMMON)
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#define ADC_CCR_TSEN (ADC_CCR_VSENSESEL)
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#define OVERSAMPLES (0)
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#define ADC_MEAS_DELAY (10)
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#define OVERSAMPLES (0)
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#define ADC_MEAS_DELAY (10)
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#endif
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#define ADC_TEMPERATURE_PIN 0xfe
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@ -126,8 +129,13 @@ static const uint8_t adc_pins[] = {
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GPIO('H', 3), // ADC3_INP14
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GPIO('H', 4), // ADC3_INP15
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GPIO('H', 5), // ADC3_INP16
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#if CONFIG_MACH_STM32H723
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ADC_TEMPERATURE_PIN,
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0,
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#else
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0, // Vbat/4
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ADC_TEMPERATURE_PIN,// VSENSE
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#endif
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0, // VREFINT
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#elif CONFIG_MACH_STM32G4
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0, // [0] vssa
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@ -239,20 +247,31 @@ gpio_adc_setup(uint32_t pin)
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}
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// Enable the ADC
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if (!(adc->CR & ADC_CR_ADEN)){
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if (!(adc->CR & ADC_CR_ADEN)) {
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// STM32H723 ADC3 and ADC1/2 registers are slightly different
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uint8_t is_stm32h723_adc3 = 0;
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#if CONFIG_MACH_STM32H723
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if (adc == ADC3) {
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is_stm32h723_adc3 = 1;
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}
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#endif
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// Pwr
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// Exit deep power down
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MODIFY_REG(adc->CR, ADC_CR_DEEPPWD_Msk, 0);
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// Switch on voltage regulator
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adc->CR |= ADC_CR_ADVREGEN;
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#ifdef ADC_ISR_LDORDY
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if (is_stm32h723_adc3 == 0) {
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while(!(adc->ISR & ADC_ISR_LDORDY))
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;
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#else // stm32l4 lacks ldordy, delay to spec instead
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} else
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#endif
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{
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// stm32h723 ADC3 & stm32l4 lacks ldordy, delay to spec instead
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uint32_t end = timer_read_time() + timer_from_us(20);
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while (timer_is_before(timer_read_time(), end))
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;
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#endif
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}
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// Set Boost mode for 25Mhz < ADC clock <= 50Mhz
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#ifdef ADC_CR_BOOST
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@ -295,12 +314,26 @@ gpio_adc_setup(uint32_t pin)
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// Disable Continuous Mode
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MODIFY_REG(adc->CFGR, ADC_CFGR_CONT_Msk, 0);
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// Set to 12 bit
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MODIFY_REG(adc->CFGR, ADC_CFGR_RES_Msk, ADC_RES << ADC_CFGR_RES_Pos);
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if (is_stm32h723_adc3) {
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#ifdef ADC3_CFGR_RES
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MODIFY_REG(adc->CFGR, ADC3_CFGR_RES_Msk, 0 << ADC3_CFGR_RES_Pos);
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MODIFY_REG(adc->CFGR, ADC3_CFGR_ALIGN_Msk, 0<<ADC3_CFGR_ALIGN_Pos);
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#endif
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} else {
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MODIFY_REG(adc->CFGR, ADC_CFGR_RES_Msk, ADC_RES<<ADC_CFGR_RES_Pos);
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}
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#if CONFIG_MACH_STM32H7
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// Set hardware oversampling
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MODIFY_REG(adc->CFGR2, ADC_CFGR2_ROVSE_Msk, ADC_CFGR2_ROVSE);
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if (is_stm32h723_adc3) {
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#ifdef ADC3_CFGR2_OVSR
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MODIFY_REG(adc->CFGR2, ADC3_CFGR2_OVSR_Msk,
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(OVERSAMPLES_EXPONENT - 1) << ADC3_CFGR2_OVSR_Pos);
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#endif
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} else {
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MODIFY_REG(adc->CFGR2, ADC_CFGR2_OVSR_Msk,
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(OVERSAMPLES - 1) << ADC_CFGR2_OVSR_Pos);
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}
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MODIFY_REG(adc->CFGR2, ADC_CFGR2_OVSS_Msk,
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OVERSAMPLES_EXPONENT << ADC_CFGR2_OVSS_Pos);
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#else // stm32l4
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@ -15,21 +15,31 @@
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#include "sched.h" // DECL_INIT
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#if CONFIG_STM32_USB_PB14_PB15
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#define USB_PERIPH_BASE USB_OTG_HS_PERIPH_BASE
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#define OTG_IRQn OTG_HS_IRQn
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#define USBOTGEN RCC_AHB1ENR_USB1OTGHSEN
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#define GPIO_D_NEG GPIO('B', 14)
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#define GPIO_D_POS GPIO('B', 15)
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#define GPIO_FUNC GPIO_FUNCTION(12)
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DECL_CONSTANT_STR("RESERVE_PINS_USB1", "PB14,PB15");
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#define IS_OTG_HS 1
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#define GPIO_D_NEG GPIO('B', 14)
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#define GPIO_D_POS GPIO('B', 15)
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#define GPIO_FUNC GPIO_FUNCTION(12)
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DECL_CONSTANT_STR("RESERVE_PINS_USB1", "PB14,PB15");
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#else
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#define USB_PERIPH_BASE USB_OTG_FS_PERIPH_BASE
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#define OTG_IRQn OTG_FS_IRQn
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#define USBOTGEN RCC_AHB1ENR_USB2OTGHSEN
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#define GPIO_D_NEG GPIO('A', 11)
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#define GPIO_D_POS GPIO('A', 12)
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#define GPIO_FUNC GPIO_FUNCTION(10)
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DECL_CONSTANT_STR("RESERVE_PINS_USB", "PA11,PA12");
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#if CONFIG_MACH_STM32H723
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#define IS_OTG_HS 1
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#else
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#define IS_OTG_HS 0
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#endif
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#define GPIO_D_NEG GPIO('A', 11)
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#define GPIO_D_POS GPIO('A', 12)
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#define GPIO_FUNC GPIO_FUNCTION(10)
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DECL_CONSTANT_STR("RESERVE_PINS_USB", "PA11,PA12");
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#endif
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#if IS_OTG_HS
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#define USB_PERIPH_BASE USB_OTG_HS_PERIPH_BASE
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#define OTG_IRQn OTG_HS_IRQn
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#define USBOTGEN RCC_AHB1ENR_USB1OTGHSEN
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#else
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#define USB_PERIPH_BASE USB_OTG_FS_PERIPH_BASE
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#define OTG_IRQn OTG_FS_IRQn
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#define USBOTGEN RCC_AHB1ENR_USB2OTGHSEN
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#endif
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static void
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