stm32: STM32F0 CAN feature
Signed-off-by: Eug Krashtan <eug.krashtan@gmail.com> Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
This commit is contained in:
Eug Krashtan
Kevin O'Connor
parent
5238c3f872
commit
a34dbc7029
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@ -135,9 +135,13 @@ config CANSERIAL
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bool "Use CAN for communication (instead of serial)"
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bool "Use CAN for communication (instead of serial)"
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depends on MACH_STM32F042 && !USBSERIAL
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depends on MACH_STM32F042 && !USBSERIAL
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default n
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default n
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config SERIAL_BAUD
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int "CAN bus speed" if LOW_LEVEL_OPTIONS && CANSERIAL
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default 500000 if CANSERIAL
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config STM32F042_PIN_SWAP
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config STM32F042_PIN_SWAP
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bool "Use PA9/PA10 for USB or CAN" if MACH_STM32F042
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bool "Use PA9/PA10 for USB or CAN" if MACH_STM32F042
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depends on (USBSERIAL || CANSERIAL) && MACH_STM32F042
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depends on (USBSERIAL || CANSERIAL) && MACH_STM32F042
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default y if (USBSERIAL || CANSERIAL)
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default n
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default n
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config SERIAL
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config SERIAL
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depends on !USBSERIAL && !CANSERIAL
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depends on !USBSERIAL && !CANSERIAL
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@ -41,6 +41,8 @@ src-$(CONFIG_USBSERIAL) += $(usb-src-y) stm32/chipid.c generic/usb_cdc.c
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serial-src-y := stm32/serial.c
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serial-src-y := stm32/serial.c
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serial-src-$(CONFIG_MACH_STM32F0) := stm32/stm32f0_serial.c
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serial-src-$(CONFIG_MACH_STM32F0) := stm32/stm32f0_serial.c
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src-$(CONFIG_SERIAL) += $(serial-src-y) generic/serial_irq.c
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src-$(CONFIG_SERIAL) += $(serial-src-y) generic/serial_irq.c
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can-src-$(CONFIG_MACH_STM32F0) := stm32/stm32f0_can.c
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src-$(CONFIG_CANSERIAL) += $(can-src-y) generic/serial_irq.c
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# Binary output file rules
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# Binary output file rules
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target-y += $(OUT)klipper.bin
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target-y += $(OUT)klipper.bin
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@ -0,0 +1,267 @@
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/*
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* Serial over CAN emulation for STM32F042 boards.
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*
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* Copyright (C) 2019 Eug Krashtan <eug.krashtan@gmail.com>
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* This file may be distributed under the terms of the GNU GPLv3 license.
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*
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*/
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#include "autoconf.h" // CONFIG_SERIAL_BAUD
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#include "board/armcm_boot.h" // armcm_enable_irq
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#include "board/serial_irq.h" // serial_rx_byte
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#include "command.h" // DECL_CONSTANT_STR
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#include "internal.h" // enable_pclock
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#include "sched.h" // DECL_INIT
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#include <string.h>
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#include "stm32f0_can.h"
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DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PA11,PA12");
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#define GPIO_Rx GPIO('A', 11)
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#define GPIO_Tx GPIO('A', 12)
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#define MCR_FLAGS (CAN_MCR_NART)
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#define BTR_FLAGS (CAN_BTR_TS1_2 | CAN_BTR_TS2_0 | /* prescaler */ 11U )
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#define CAN_FILTER_NUMBER 0
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#define CAN_DATA3_Pos 24
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#define CAN_DATA2_Pos 16
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#define CAN_DATA1_Pos 8
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#define CAN_DATA0_Pos 0
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static uint16_t MyCanId = 0;
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static void can_transmit(uint32_t id, uint32_t dlc, uint8_t *pkt)
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{
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/* ToDo: implement serial_get_tx_byte() inside TXComplete interrupt */
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/* Use only Mailbox 0 to avoid message fragmentation */
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while( !(CAN->TSR & CAN_TSR_TME0) ) /* wait until previous TX completes */
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;
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/* Set up the Id */
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CAN->sTxMailBox[0].TIR &= CAN_TI1R_TXRQ;
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CAN->sTxMailBox[0].TIR |= (id << CAN_TI1R_STID_Pos);
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/* Set up the DLC */
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CAN->sTxMailBox[0].TDTR &= 0xFFFFFFF0U;
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CAN->sTxMailBox[0].TDTR |= (dlc & 0xFU);
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/* Set up the data field */
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if(pkt) {
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CAN->sTxMailBox[0].TDLR = ((uint32_t)pkt[3] << CAN_DATA3_Pos) |
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((uint32_t)pkt[2] << CAN_DATA2_Pos) |
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((uint32_t)pkt[1] << CAN_DATA1_Pos) |
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((uint32_t)pkt[0] << CAN_DATA0_Pos);
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CAN->sTxMailBox[0].TDHR = ((uint32_t)pkt[7] << CAN_DATA3_Pos) |
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((uint32_t)pkt[6] << CAN_DATA2_Pos) |
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((uint32_t)pkt[5] << CAN_DATA1_Pos) |
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((uint32_t)pkt[4] << CAN_DATA0_Pos);
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}
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/* Request transmission */
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__sync_synchronize(); // disable write optimization
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CAN->sTxMailBox[0].TIR |= CAN_TI1R_TXRQ;
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}
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// Convert Unique 96-bit value into 48 bit representation
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static void pack_uuid(uint8_t* u)
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{
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for(int i=0; i<SHORT_UUID_LEN; i++) {
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u[i] = *((uint8_t*)(STM32_UUID_ADDR+i)) ^
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*((uint8_t*)(STM32_UUID_ADDR+i+SHORT_UUID_LEN));
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}
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}
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static void can_uuid_resp(void)
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{
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uint8_t short_uuid[SHORT_UUID_LEN];
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pack_uuid(short_uuid);
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can_transmit(PKT_ID_UUID_RESP, SHORT_UUID_LEN, short_uuid);
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}
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static void get_data(uint8_t* buf, uint8_t mbox)
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{
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for(int i=0; i < 8; i++ ) {
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if (i<4) {
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buf[i] = (CAN->sFIFOMailBox[mbox].RDLR >> (i*8)) & 0xFF;
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} else {
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buf[i] = (CAN->sFIFOMailBox[mbox].RDHR >> ((i-4)*8))& 0xFF;
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}
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}
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}
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void CAN_RxCpltCallback(uint8_t mbox)
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{
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uint32_t id = (CAN->sFIFOMailBox[mbox].RIR >> CAN_RI0R_STID_Pos) & 0x7FF;
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uint8_t dlc = CAN->sFIFOMailBox[mbox].RDTR & CAN_RDT0R_DLC;
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uint8_t databuf[8];
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if(!MyCanId) { // If serial not assigned yet
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if(id==PKT_ID_UUID && dlc == 0) {
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// Just inform host about my UUID
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can_uuid_resp();
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} else if (id == PKT_ID_SET) {
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uint8_t short_uuid[SHORT_UUID_LEN];
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pack_uuid(short_uuid);
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// compare my UUID with packet to check if this packet mine
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get_data(databuf, mbox);
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if (memcmp(&(databuf[2]), short_uuid, SHORT_UUID_LEN) == 0) {
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memcpy(&MyCanId, databuf, sizeof(uint16_t));
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/* Set new filter values */
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uint32_t filternbrbitpos = (1U) << CAN_FILTER_NUMBER;
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CAN->FA1R &= ~(filternbrbitpos);
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/* Personal ID */
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CAN->sFilterRegister[CAN_FILTER_NUMBER].FR1 =
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((uint32_t)(MyCanId<<5) << 16U);
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/* Catch reset command */
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CAN->sFilterRegister[CAN_FILTER_NUMBER].FR2 =
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((uint32_t)(PKT_ID_UUID<<5) << 16U);
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/* Filter activation */
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CAN->FA1R |= filternbrbitpos;
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/* Leave the initialisation mode for the filter */
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CAN->FMR &= ~(CAN_FMR_FINIT);
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}
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}
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} else {
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if (id == MyCanId) {
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// compare my UUID with packet to check if this packet mine
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if(dlc == 0) {
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// empty packet == ping request
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can_transmit(MyCanId+1, 0, NULL);
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} else {
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get_data(databuf, mbox);
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for(int i=0; i < dlc; i++ ) {
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serial_rx_byte(databuf[i]);
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}
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}
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}
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else if (id == PKT_ID_UUID && dlc > 0)
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{
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get_data(databuf, mbox);
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if (memcmp(databuf, &MyCanId, 2) == 0)
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{
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// Reset from host
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NVIC_SystemReset();
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}
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}
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}
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}
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/**
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* @brief This function handles HDMI-CEC and CAN global interrupts /
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* HDMI-CEC wake-up interrupt through EXTI line 27.
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*/
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void
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CEC_CAN_IRQHandler(void)
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{
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if (CAN->RF0R & CAN_RF0R_FMP0) {
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// Mailbox 0
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while(CAN->RF0R & CAN_RF0R_FMP0) {
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CAN_RxCpltCallback(0);
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CAN->RF0R |= CAN_RF0R_RFOM0;
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}
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}
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if (CAN->RF1R & CAN_RF1R_FMP1) {
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// Mailbox 1
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while(CAN->RF1R & CAN_RF1R_FMP1) {
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CAN_RxCpltCallback(1);
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CAN->RF1R |= CAN_RF1R_RFOM1;
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}
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}
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/* Check Overrun flag for FIFO0 */
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if(CAN->RF0R & CAN_RF0R_FOVR0)
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{
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/* Clear FIFO0 Overrun Flag */
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CAN->RF0R |= CAN_RF0R_FOVR0;
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}
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/* Check Overrun flag for FIFO1 */
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if(CAN->RF1R & CAN_RF1R_FOVR1)
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{
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/* Clear FIFO1 Overrun Flag */
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CAN->RF1R |= CAN_RF1R_FOVR1;
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}
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}
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void
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can_init(void)
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{
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enable_pclock((uint32_t)CAN);
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gpio_peripheral(GPIO_Rx, GPIO_FUNCTION(4), 1);
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gpio_peripheral(GPIO_Tx, GPIO_FUNCTION(4), 0);
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/*##-1- Configure the CAN #######################################*/
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/* Exit from sleep mode */
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CAN->MCR &= ~(CAN_MCR_SLEEP);
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/* Request initialisation */
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CAN->MCR |= CAN_MCR_INRQ;
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/* Wait the acknowledge */
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while( !(CAN->MSR & CAN_MSR_INAK) );
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CAN->MCR |= MCR_FLAGS;
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CAN->BTR = BTR_FLAGS;
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/* Request leave initialisation */
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CAN->MCR &= ~(CAN_MCR_INRQ);
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/* Wait the acknowledge */
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while( CAN->MSR & CAN_MSR_INAK );
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/*##-2- Configure the CAN Filter #######################################*/
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uint32_t filternbrbitpos = (1U) << CAN_FILTER_NUMBER;
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/* Select the start slave bank */
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CAN->FMR |= CAN_FMR_FINIT;
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/* Initialisation mode for the filter */
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CAN->FA1R &= ~(filternbrbitpos);
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CAN->sFilterRegister[CAN_FILTER_NUMBER].FR1 =
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((uint32_t)(PKT_ID_UUID<<5) << 16U);
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CAN->sFilterRegister[CAN_FILTER_NUMBER].FR2 =
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((uint32_t)(PKT_ID_SET<<5) << 16U);
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/*Identifier list mode for the filter*/
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CAN->FM1R |= filternbrbitpos;
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/* 32-bit scale for the filter */
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CAN->FS1R |= filternbrbitpos;
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/* FIFO 0 assignation for the filter */
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CAN->FFA1R &= ~(filternbrbitpos);
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/* Filter activation */
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CAN->FA1R |= filternbrbitpos;
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/* Leave the initialisation mode for the filter */
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CAN->FMR &= ~(CAN_FMR_FINIT);
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/*##-3- Configure Transmission process #################################*/
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CAN->IER |= (CAN_IER_FMPIE0 | CAN_IER_FMPIE1);
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armcm_enable_irq(CEC_CAN_IRQHandler, CEC_CAN_IRQn, 0);
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/*##-4- Say Hello #################################*/
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can_uuid_resp();
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}
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DECL_INIT(can_init);
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void
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serial_enable_tx_irq(void)
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{
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uint8_t databuf[8];
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if(MyCanId == 0)
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// Serial port not initialized
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return;
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uint8_t txdata =1;
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while(txdata) {
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int i=0;
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for (;i<8;)
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{
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if(serial_get_tx_byte(&(databuf[i])) == -1) {
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txdata = 0;
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break;
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}
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i++;
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}
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if (i>0) {
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can_transmit(MyCanId+1, i, databuf);
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}
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}
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}
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@ -0,0 +1,17 @@
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#ifndef CORE_INC_CAN_H_
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#define CORE_INC_CAN_H_
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// Read UUID (6bytes)
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#define PKT_ID_UUID (0x321)
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// Set address (2bytes) to UUID (6b)
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#define PKT_ID_SET (0x322)
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// UUID response from slave (6bytes)
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#define PKT_ID_UUID_RESP (0x323)
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#define STM32_UUID_ADDR (0x1FFFF7AC)
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#define SHORT_UUID_LEN (6)
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void CanInit(void);
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void CanTransmit(uint32_t id, uint32_t dlc, uint8_t *pkt);
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#endif /* CORE_INC_CAN_H_ */
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