stm32: Use stm32f0_serial.c on stm32h7 chips
The stm32h7 uses similar usart hardware as the stm32f0 and stm32g0 chips. Use the same code implementation for all these chips. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
This commit is contained in:
Kevin O'Connor
parent
26e6ade175
commit
972ae4ab7c
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@ -63,7 +63,7 @@ src-$(CONFIG_USBSERIAL) += $(usb-src-y) stm32/chipid.c generic/usb_cdc.c
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serial-src-y := stm32/serial.c
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serial-src-$(CONFIG_MACH_STM32F0) := stm32/stm32f0_serial.c
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serial-src-$(CONFIG_MACH_STM32G0) := stm32/stm32f0_serial.c
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serial-src-$(CONFIG_MACH_STM32H7) := stm32/stm32h7_serial.c
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serial-src-$(CONFIG_MACH_STM32H7) := stm32/stm32f0_serial.c
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src-$(CONFIG_SERIAL) += $(serial-src-y) generic/serial_irq.c
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canbus-src-y := generic/canserial.c ../lib/fast-hash/fasthash.c
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canbus-src-$(CONFIG_HAVE_STM32_CANBUS) += stm32/can.c
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@ -16,21 +16,21 @@
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DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA10,PA9");
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#define GPIO_Rx GPIO('A', 10)
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#define GPIO_Tx GPIO('A', 9)
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#define USARTx_FUNCTION GPIO_FUNCTION(1)
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#define USARTx_FUNCTION GPIO_FUNCTION(CONFIG_MACH_STM32H7 ? 7 : 1)
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#define USARTx USART1
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#define USARTx_IRQn USART1_IRQn
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#elif CONFIG_STM32_SERIAL_USART1_ALT_PB7_PB6
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DECL_CONSTANT_STR("RESERVE_PINS_serial", "PB7,PB6");
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#define GPIO_Rx GPIO('B', 7)
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#define GPIO_Tx GPIO('B', 6)
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#define USARTx_FUNCTION GPIO_FUNCTION(0)
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#define USARTx_FUNCTION GPIO_FUNCTION(CONFIG_MACH_STM32H7 ? 7 : 0)
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#define USARTx USART1
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#define USARTx_IRQn USART1_IRQn
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#elif CONFIG_STM32_SERIAL_USART2
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DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA3,PA2");
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#define GPIO_Rx GPIO('A', 3)
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#define GPIO_Tx GPIO('A', 2)
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#define USARTx_FUNCTION GPIO_FUNCTION(1)
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#define USARTx_FUNCTION GPIO_FUNCTION(CONFIG_MACH_STM32H7 ? 7 : 1)
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#define USARTx USART2
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#define USARTx_IRQn USART2_IRQn
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#elif CONFIG_STM32_SERIAL_USART2_ALT_PA15_PA14
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@ -40,6 +40,34 @@
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#define USARTx_FUNCTION GPIO_FUNCTION(1)
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#define USARTx USART2
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#define USARTx_IRQn USART2_IRQn
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#elif CONFIG_STM32_SERIAL_USART2_ALT_PD6_PD5
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DECL_CONSTANT_STR("RESERVE_PINS_serial", "PD6,PD5");
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#define GPIO_Rx GPIO('D', 6)
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#define GPIO_Tx GPIO('D', 5)
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#define USARTx_FUNCTION GPIO_FUNCTION(7)
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#define USARTx USART2
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#define USARTx_IRQn USART2_IRQn
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#elif CONFIG_STM32_SERIAL_USART3
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DECL_CONSTANT_STR("RESERVE_PINS_serial", "PB11,PB10");
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#define GPIO_Rx GPIO('B', 11)
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#define GPIO_Tx GPIO('B', 10)
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#define USARTx_FUNCTION GPIO_FUNCTION(7)
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#define USARTx USART3
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#define USARTx_IRQn USART3_IRQn
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#elif CONFIG_STM32_SERIAL_USART3_ALT_PD9_PD8
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DECL_CONSTANT_STR("RESERVE_PINS_serial", "PD9,PD8");
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#define GPIO_Rx GPIO('D', 9)
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#define GPIO_Tx GPIO('D', 8)
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#define USARTx_FUNCTION GPIO_FUNCTION(7)
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#define USARTx USART3
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#define USARTx_IRQn USART3_IRQn
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#elif CONFIG_STM32_SERIAL_UART4
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DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA1,PA0");
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#define GPIO_Rx GPIO('A', 1)
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#define GPIO_Tx GPIO('A', 0)
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#define USARTx_FUNCTION GPIO_FUNCTION(8)
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#define USARTx UART4
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#define USARTx_IRQn UART4_IRQn
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#endif
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#if CONFIG_MACH_STM32F031
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@ -57,6 +85,10 @@
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#define USART_ISR_TXE USART_ISR_TXE_TXFNF
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#define USART_BRR_DIV_MANTISSA_Pos 4
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#define USART_BRR_DIV_FRACTION_Pos 0
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#elif CONFIG_MACH_STM32H7
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// The stm32h7 has slightly different register names
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#define USART_ISR_RXNE USART_ISR_RXNE_RXFNE
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#define USART_ISR_TXE USART_ISR_TXE_TXFNF
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#endif
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#define CR1_FLAGS (USART_CR1_UE | USART_CR1_RE | USART_CR1_TE \
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@ -1,106 +0,0 @@
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// STM32H7 serial
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//
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// Copyright (C) 2019 Kevin O'Connor <kevin@koconnor.net>
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//
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// This file may be distributed under the terms of the GNU GPLv3 license.
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#include "autoconf.h" // CONFIG_SERIAL_BAUD
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#include "board/armcm_boot.h" // armcm_enable_irq
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#include "board/serial_irq.h" // serial_rx_byte
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#include "command.h" // DECL_CONSTANT_STR
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#include "internal.h" // enable_pclock
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#include "sched.h" // DECL_INIT
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// Select the configured serial port
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#if CONFIG_STM32_SERIAL_USART1
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DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA10,PA9");
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#define GPIO_Rx GPIO('A', 10)
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#define GPIO_Tx GPIO('A', 9)
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#define USARTx USART1
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#define USARTx_IRQn USART1_IRQn
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#elif CONFIG_STM32_SERIAL_USART1_ALT_PB7_PB6
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DECL_CONSTANT_STR("RESERVE_PINS_serial", "PB7,PB6");
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#define GPIO_Rx GPIO('B', 7)
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#define GPIO_Tx GPIO('B', 6)
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#define USARTx USART1
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#define USARTx_IRQn USART1_IRQn
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#elif CONFIG_STM32_SERIAL_USART2
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DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA3,PA2");
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#define GPIO_Rx GPIO('A', 3)
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#define GPIO_Tx GPIO('A', 2)
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#define USARTx USART2
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#define USARTx_IRQn USART2_IRQn
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#elif CONFIG_STM32_SERIAL_USART2_ALT_PD6_PD5
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DECL_CONSTANT_STR("RESERVE_PINS_serial", "PD6,PD5");
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#define GPIO_Rx GPIO('D', 6)
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#define GPIO_Tx GPIO('D', 5)
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#define USARTx USART2
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#define USARTx_IRQn USART2_IRQn
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#elif CONFIG_STM32_SERIAL_USART3
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DECL_CONSTANT_STR("RESERVE_PINS_serial", "PB11,PB10");
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#define GPIO_Rx GPIO('B', 11)
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#define GPIO_Tx GPIO('B', 10)
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#define USARTx USART3
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#define USARTx_IRQn USART3_IRQn
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#elif CONFIG_STM32_SERIAL_USART3_ALT_PD9_PD8
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DECL_CONSTANT_STR("RESERVE_PINS_serial", "PD9,PD8");
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#define GPIO_Rx GPIO('D', 9)
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#define GPIO_Tx GPIO('D', 8)
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#define USARTx USART3
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#define USARTx_IRQn USART3_IRQn
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#elif CONFIG_STM32_SERIAL_UART4
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DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA1,PA0");
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#define GPIO_Rx GPIO('A', 1)
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#define GPIO_Tx GPIO('A', 0)
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#define USARTx UART4
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#define USARTx_IRQn UART4_IRQn
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#define USARTx_FUNCTION GPIO_FUNCTION(8)
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#endif
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#ifndef USARTx_FUNCTION
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#define USARTx_FUNCTION GPIO_FUNCTION(7)
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#endif
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#define CR1_FLAGS (USART_CR1_UE | USART_CR1_RE | USART_CR1_TE \
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| USART_CR1_RXNEIE)
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void
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USARTx_IRQHandler(void)
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{
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uint32_t isr = USARTx->ISR;
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if (isr & USART_ISR_RXNE_RXFNE)
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serial_rx_byte(USARTx->RDR);
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//USART_ISR_TXE_TXFNF only works with Fifo mode disabled
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if (isr & USART_ISR_TXE_TXFNF && USARTx->CR1 & USART_CR1_TXEIE) {
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uint8_t data;
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int ret = serial_get_tx_byte(&data);
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if (ret)
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USARTx->CR1 = CR1_FLAGS;
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else
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USARTx->TDR = data;
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}
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}
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void
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serial_enable_tx_irq(void)
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{
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USARTx->CR1 = CR1_FLAGS | USART_CR1_TXEIE;
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}
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void
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serial_init(void)
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{
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enable_pclock((uint32_t)USARTx);
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uint32_t pclk = get_pclock_frequency((uint32_t)USARTx);
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uint32_t div = DIV_ROUND_CLOSEST(pclk, CONFIG_SERIAL_BAUD);
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USARTx->BRR = (((div / 16) << USART_BRR_DIV_MANTISSA_Pos)
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| ((div % 16) << USART_BRR_DIV_FRACTION_Pos));
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USARTx->CR3 = USART_CR3_OVRDIS; // disable the ORE ISR
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USARTx->CR1 = CR1_FLAGS;
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armcm_enable_irq(USARTx_IRQHandler, USARTx_IRQn, 0);
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gpio_peripheral(GPIO_Rx, USARTx_FUNCTION, 1);
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gpio_peripheral(GPIO_Tx, USARTx_FUNCTION, 0);
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}
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DECL_INIT(serial_init);
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