From 972ae4ab7c968d133e5160fe1a71dac63fd08a7b Mon Sep 17 00:00:00 2001 From: Kevin O'Connor Date: Mon, 31 Oct 2022 13:13:32 -0400 Subject: [PATCH] stm32: Use stm32f0_serial.c on stm32h7 chips The stm32h7 uses similar usart hardware as the stm32f0 and stm32g0 chips. Use the same code implementation for all these chips. Signed-off-by: Kevin O'Connor --- src/stm32/Makefile | 2 +- src/stm32/stm32f0_serial.c | 38 +++++++++++-- src/stm32/stm32h7_serial.c | 106 ------------------------------------- 3 files changed, 36 insertions(+), 110 deletions(-) delete mode 100644 src/stm32/stm32h7_serial.c diff --git a/src/stm32/Makefile b/src/stm32/Makefile index 58132b06..8514a8df 100644 --- a/src/stm32/Makefile +++ b/src/stm32/Makefile @@ -63,7 +63,7 @@ src-$(CONFIG_USBSERIAL) += $(usb-src-y) stm32/chipid.c generic/usb_cdc.c serial-src-y := stm32/serial.c serial-src-$(CONFIG_MACH_STM32F0) := stm32/stm32f0_serial.c serial-src-$(CONFIG_MACH_STM32G0) := stm32/stm32f0_serial.c -serial-src-$(CONFIG_MACH_STM32H7) := stm32/stm32h7_serial.c +serial-src-$(CONFIG_MACH_STM32H7) := stm32/stm32f0_serial.c src-$(CONFIG_SERIAL) += $(serial-src-y) generic/serial_irq.c canbus-src-y := generic/canserial.c ../lib/fast-hash/fasthash.c canbus-src-$(CONFIG_HAVE_STM32_CANBUS) += stm32/can.c diff --git a/src/stm32/stm32f0_serial.c b/src/stm32/stm32f0_serial.c index da76be42..f7f17dfc 100644 --- a/src/stm32/stm32f0_serial.c +++ b/src/stm32/stm32f0_serial.c @@ -16,21 +16,21 @@ DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA10,PA9"); #define GPIO_Rx GPIO('A', 10) #define GPIO_Tx GPIO('A', 9) - #define USARTx_FUNCTION GPIO_FUNCTION(1) + #define USARTx_FUNCTION GPIO_FUNCTION(CONFIG_MACH_STM32H7 ? 7 : 1) #define USARTx USART1 #define USARTx_IRQn USART1_IRQn #elif CONFIG_STM32_SERIAL_USART1_ALT_PB7_PB6 DECL_CONSTANT_STR("RESERVE_PINS_serial", "PB7,PB6"); #define GPIO_Rx GPIO('B', 7) #define GPIO_Tx GPIO('B', 6) - #define USARTx_FUNCTION GPIO_FUNCTION(0) + #define USARTx_FUNCTION GPIO_FUNCTION(CONFIG_MACH_STM32H7 ? 7 : 0) #define USARTx USART1 #define USARTx_IRQn USART1_IRQn #elif CONFIG_STM32_SERIAL_USART2 DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA3,PA2"); #define GPIO_Rx GPIO('A', 3) #define GPIO_Tx GPIO('A', 2) - #define USARTx_FUNCTION GPIO_FUNCTION(1) + #define USARTx_FUNCTION GPIO_FUNCTION(CONFIG_MACH_STM32H7 ? 7 : 1) #define USARTx USART2 #define USARTx_IRQn USART2_IRQn #elif CONFIG_STM32_SERIAL_USART2_ALT_PA15_PA14 @@ -40,6 +40,34 @@ #define USARTx_FUNCTION GPIO_FUNCTION(1) #define USARTx USART2 #define USARTx_IRQn USART2_IRQn +#elif CONFIG_STM32_SERIAL_USART2_ALT_PD6_PD5 + DECL_CONSTANT_STR("RESERVE_PINS_serial", "PD6,PD5"); + #define GPIO_Rx GPIO('D', 6) + #define GPIO_Tx GPIO('D', 5) + #define USARTx_FUNCTION GPIO_FUNCTION(7) + #define USARTx USART2 + #define USARTx_IRQn USART2_IRQn +#elif CONFIG_STM32_SERIAL_USART3 + DECL_CONSTANT_STR("RESERVE_PINS_serial", "PB11,PB10"); + #define GPIO_Rx GPIO('B', 11) + #define GPIO_Tx GPIO('B', 10) + #define USARTx_FUNCTION GPIO_FUNCTION(7) + #define USARTx USART3 + #define USARTx_IRQn USART3_IRQn +#elif CONFIG_STM32_SERIAL_USART3_ALT_PD9_PD8 + DECL_CONSTANT_STR("RESERVE_PINS_serial", "PD9,PD8"); + #define GPIO_Rx GPIO('D', 9) + #define GPIO_Tx GPIO('D', 8) + #define USARTx_FUNCTION GPIO_FUNCTION(7) + #define USARTx USART3 + #define USARTx_IRQn USART3_IRQn +#elif CONFIG_STM32_SERIAL_UART4 + DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA1,PA0"); + #define GPIO_Rx GPIO('A', 1) + #define GPIO_Tx GPIO('A', 0) + #define USARTx_FUNCTION GPIO_FUNCTION(8) + #define USARTx UART4 + #define USARTx_IRQn UART4_IRQn #endif #if CONFIG_MACH_STM32F031 @@ -57,6 +85,10 @@ #define USART_ISR_TXE USART_ISR_TXE_TXFNF #define USART_BRR_DIV_MANTISSA_Pos 4 #define USART_BRR_DIV_FRACTION_Pos 0 +#elif CONFIG_MACH_STM32H7 + // The stm32h7 has slightly different register names + #define USART_ISR_RXNE USART_ISR_RXNE_RXFNE + #define USART_ISR_TXE USART_ISR_TXE_TXFNF #endif #define CR1_FLAGS (USART_CR1_UE | USART_CR1_RE | USART_CR1_TE \ diff --git a/src/stm32/stm32h7_serial.c b/src/stm32/stm32h7_serial.c deleted file mode 100644 index b5070290..00000000 --- a/src/stm32/stm32h7_serial.c +++ /dev/null @@ -1,106 +0,0 @@ -// STM32H7 serial -// -// Copyright (C) 2019 Kevin O'Connor -// -// This file may be distributed under the terms of the GNU GPLv3 license. - -#include "autoconf.h" // CONFIG_SERIAL_BAUD -#include "board/armcm_boot.h" // armcm_enable_irq -#include "board/serial_irq.h" // serial_rx_byte -#include "command.h" // DECL_CONSTANT_STR -#include "internal.h" // enable_pclock -#include "sched.h" // DECL_INIT - -// Select the configured serial port -#if CONFIG_STM32_SERIAL_USART1 - DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA10,PA9"); - #define GPIO_Rx GPIO('A', 10) - #define GPIO_Tx GPIO('A', 9) - #define USARTx USART1 - #define USARTx_IRQn USART1_IRQn -#elif CONFIG_STM32_SERIAL_USART1_ALT_PB7_PB6 - DECL_CONSTANT_STR("RESERVE_PINS_serial", "PB7,PB6"); - #define GPIO_Rx GPIO('B', 7) - #define GPIO_Tx GPIO('B', 6) - #define USARTx USART1 - #define USARTx_IRQn USART1_IRQn -#elif CONFIG_STM32_SERIAL_USART2 - DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA3,PA2"); - #define GPIO_Rx GPIO('A', 3) - #define GPIO_Tx GPIO('A', 2) - #define USARTx USART2 - #define USARTx_IRQn USART2_IRQn -#elif CONFIG_STM32_SERIAL_USART2_ALT_PD6_PD5 - DECL_CONSTANT_STR("RESERVE_PINS_serial", "PD6,PD5"); - #define GPIO_Rx GPIO('D', 6) - #define GPIO_Tx GPIO('D', 5) - #define USARTx USART2 - #define USARTx_IRQn USART2_IRQn -#elif CONFIG_STM32_SERIAL_USART3 - DECL_CONSTANT_STR("RESERVE_PINS_serial", "PB11,PB10"); - #define GPIO_Rx GPIO('B', 11) - #define GPIO_Tx GPIO('B', 10) - #define USARTx USART3 - #define USARTx_IRQn USART3_IRQn -#elif CONFIG_STM32_SERIAL_USART3_ALT_PD9_PD8 - DECL_CONSTANT_STR("RESERVE_PINS_serial", "PD9,PD8"); - #define GPIO_Rx GPIO('D', 9) - #define GPIO_Tx GPIO('D', 8) - #define USARTx USART3 - #define USARTx_IRQn USART3_IRQn -#elif CONFIG_STM32_SERIAL_UART4 - DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA1,PA0"); - #define GPIO_Rx GPIO('A', 1) - #define GPIO_Tx GPIO('A', 0) - #define USARTx UART4 - #define USARTx_IRQn UART4_IRQn - #define USARTx_FUNCTION GPIO_FUNCTION(8) -#endif - -#ifndef USARTx_FUNCTION - #define USARTx_FUNCTION GPIO_FUNCTION(7) -#endif - -#define CR1_FLAGS (USART_CR1_UE | USART_CR1_RE | USART_CR1_TE \ - | USART_CR1_RXNEIE) - -void -USARTx_IRQHandler(void) -{ - uint32_t isr = USARTx->ISR; - if (isr & USART_ISR_RXNE_RXFNE) - serial_rx_byte(USARTx->RDR); - //USART_ISR_TXE_TXFNF only works with Fifo mode disabled - if (isr & USART_ISR_TXE_TXFNF && USARTx->CR1 & USART_CR1_TXEIE) { - uint8_t data; - int ret = serial_get_tx_byte(&data); - if (ret) - USARTx->CR1 = CR1_FLAGS; - else - USARTx->TDR = data; - } -} - -void -serial_enable_tx_irq(void) -{ - USARTx->CR1 = CR1_FLAGS | USART_CR1_TXEIE; -} - -void -serial_init(void) -{ - enable_pclock((uint32_t)USARTx); - - uint32_t pclk = get_pclock_frequency((uint32_t)USARTx); - uint32_t div = DIV_ROUND_CLOSEST(pclk, CONFIG_SERIAL_BAUD); - USARTx->BRR = (((div / 16) << USART_BRR_DIV_MANTISSA_Pos) - | ((div % 16) << USART_BRR_DIV_FRACTION_Pos)); - USARTx->CR3 = USART_CR3_OVRDIS; // disable the ORE ISR - USARTx->CR1 = CR1_FLAGS; - armcm_enable_irq(USARTx_IRQHandler, USARTx_IRQn, 0); - - gpio_peripheral(GPIO_Rx, USARTx_FUNCTION, 1); - gpio_peripheral(GPIO_Tx, USARTx_FUNCTION, 0); -} -DECL_INIT(serial_init);