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atsamd: Add definitions for SAMD21E18 chip 

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
This commit is contained in:
Kevin O'Connor 2019-03-01 19:02:06 -05:00
parent 0b33e0b427
commit 946eb6b7ae
3 changed files with 9 additions and 3 deletions
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2
klippy/pins.py
View File

@ -46,7 +46,7 @@ MCU_PINS = {
"atmega1280": port_pins(12), "atmega2560": port_pins(12),
"sam3x8e": port_pins(4, 32), "sam3x8c": port_pins(2, 32),
"sam4s8c": port_pins(3, 32), "sam4e8e" : port_pins(5, 32),
"samd21g18a": port_pins(2, 32),
"samd21g18a": port_pins(2, 32), "samd21e18a": port_pins(2, 32),
"samd51g19a": port_pins(2, 32), "samd51j19a": port_pins(3, 32),
"samd51n19a": port_pins(3, 32), "samd51p20a": port_pins(4, 32),
"stm32f103": port_pins(5, 16),

8
src/atsamd/Kconfig
View File

@ -21,6 +21,9 @@ choice
config MACH_SAMD21G18
bool "SAMD21G18 (Arduino Zero)"
select MACH_SAMD21
config MACH_SAMD21E18
bool "SAMD21E18 (Adafruit Trinket M0)"
select MACH_SAMD21
config MACH_SAMD51G19
bool "SAMD51G19 (Adafruit ItsyBitsy M4)"
select MACH_SAMD51
@ -43,6 +46,7 @@ config MACH_SAMD51
config MCU
string
default "samd21g18a" if MACH_SAMD21G18
default "samd21e18a" if MACH_SAMD21E18
default "samd51g19a" if MACH_SAMD51G19
default "samd51j19a" if MACH_SAMD51J19
default "samd51n19a" if MACH_SAMD51N19
@ -55,13 +59,13 @@ config CLOCK_FREQ
config FLASH_SIZE
hex
default 0x40000 if MACH_SAMD21G18
default 0x40000 if MACH_SAMD21G18 || MACH_SAMD21E18
default 0x80000 if MACH_SAMD51G19 || MACH_SAMD51J19 || MACH_SAMD51N19
default 0x100000 if MACH_SAMD51P20
config RAM_SIZE
hex
default 0x8000 if MACH_SAMD21G18
default 0x8000 if MACH_SAMD21G18 || MACH_SAMD21E18
default 0x30000 if MACH_SAMD51G19 || MACH_SAMD51J19 || MACH_SAMD51N19
default 0x40000 if MACH_SAMD51P20

2
src/atsamd/sercom.c
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@ -25,8 +25,10 @@ static const struct sercom_bus sercoms[] = {
{ SERCOM1, SERCOM1_GCLK_ID_CORE, ID_SERCOM1 },
{ SERCOM2, SERCOM2_GCLK_ID_CORE, ID_SERCOM2 },
{ SERCOM3, SERCOM3_GCLK_ID_CORE, ID_SERCOM3 },
#ifdef SERCOM4
{ SERCOM4, SERCOM4_GCLK_ID_CORE, ID_SERCOM4 },
{ SERCOM5, SERCOM5_GCLK_ID_CORE, ID_SERCOM5 },
#endif
#ifdef SERCOM6
{ SERCOM6, SERCOM6_GCLK_ID_CORE, ID_SERCOM6 },
{ SERCOM7, SERCOM7_GCLK_ID_CORE, ID_SERCOM7 },