stm32: Support PA11/PA12 and PB8/PB9 on fdcan
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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@ -322,7 +322,7 @@ choice
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select SERIAL
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config STM32_CANBUS_PA11_PA12
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bool "CAN bus (on PA11/PA12)"
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depends on HAVE_STM32_CANBUS
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depends on HAVE_STM32_CANBUS || HAVE_STM32_FDCANBUS
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select CANSERIAL
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config STM32_CANBUS_PA11_PA12_REMAP
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bool "CAN bus (on PA9/PA10)" if LOW_LEVEL_OPTIONS
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@ -330,7 +330,7 @@ choice
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select CANSERIAL
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config STM32_CANBUS_PB8_PB9
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bool "CAN bus (on PB8/PB9)" if LOW_LEVEL_OPTIONS
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depends on HAVE_STM32_CANBUS
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depends on HAVE_STM32_CANBUS || HAVE_STM32_FDCANBUS
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select CANSERIAL
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config STM32_CANBUS_PI9_PH13
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bool "CAN bus (on PI9/PH13)" if LOW_LEVEL_OPTIONS
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@ -61,24 +61,31 @@ FDCAN_RAM_TypeDef *fdcan_ram = (FDCAN_RAM_TypeDef *)(SRAMCAN_BASE);
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#define FDCAN_IE_TC (FDCAN_IE_TCE | FDCAN_IE_TCFE | FDCAN_IE_TFEE)
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#if CONFIG_STM32_CANBUS_PB0_PB1
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#if CONFIG_STM32_CANBUS_PA11_PA12
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DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PA11,PA12");
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#define GPIO_Rx GPIO('A', 11)
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#define GPIO_Tx GPIO('A', 12)
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#elif CONFIG_STM32_CANBUS_PB8_PB9
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DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PB8,PB9");
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#define GPIO_Rx GPIO('B', 8)
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#define GPIO_Tx GPIO('B', 9)
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#elif CONFIG_STM32_CANBUS_PB0_PB1
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DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PB0,PB1");
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#define GPIO_Rx GPIO('B', 0)
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#define GPIO_Tx GPIO('B', 1)
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#endif
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#if CONFIG_MACH_STM32G0
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#if CONFIG_STM32_CANBUS_PB0_PB1
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#define SOC_CAN FDCAN2
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#define MSG_RAM fdcan_ram->fdcan2
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#else
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#error Uknown pins for STMF32G0 CAN
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#endif
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#define CAN_IT0_IRQn TIM16_FDCAN_IT0_IRQn
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#define CAN_FUNCTION GPIO_FUNCTION(3) // Alternative function mapping number
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#if !CONFIG_STM32_CANBUS_PB0_PB1
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#define SOC_CAN FDCAN1
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#define MSG_RAM fdcan_ram->fdcan1
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#else
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#define SOC_CAN FDCAN2
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#define MSG_RAM fdcan_ram->fdcan2
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#endif
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#define CAN_IT0_IRQn TIM16_FDCAN_IT0_IRQn
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#define CAN_FUNCTION GPIO_FUNCTION(3) // Alternative function mapping number
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#ifndef SOC_CAN
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#error No known CAN device for configured MCU
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#endif
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@ -240,9 +247,6 @@ can_init(void)
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/* Enable configuration change */
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SOC_CAN->CCCR |= FDCAN_CCCR_CCE;
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if (SOC_CAN == FDCAN1)
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FDCAN_CONFIG->CKDIV = 0;
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/* Disable protocol exception handling */
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SOC_CAN->CCCR |= FDCAN_CCCR_PXHD;
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