stm32: Update can.c to use more consistent indentation
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
This commit is contained in:
Kevin O'Connor
parent
7d4df65920
commit
901ccfcb9d
289
src/stm32/can.c
289
src/stm32/can.c
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@ -1,96 +1,90 @@
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/*
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* Serial over CAN emulation for STM32 boards.
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*
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* Copyright (C) 2019 Eug Krashtan <eug.krashtan@gmail.com>
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* Copyright (C) 2020 Pontus Borg <glpontus@gmail.com>
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* This file may be distributed under the terms of the GNU GPLv3 license.
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*
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*/
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// Serial over CAN emulation for STM32 boards.
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//
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// Copyright (C) 2019 Eug Krashtan <eug.krashtan@gmail.com>
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// Copyright (C) 2020 Pontus Borg <glpontus@gmail.com>
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//
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// This file may be distributed under the terms of the GNU GPLv3 license.
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#include "autoconf.h" //
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#include "board/armcm_boot.h" // armcm_enable_irq
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#include "board/serial_irq.h" // serial_rx_byte
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#include <string.h> // memcpy
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#include "autoconf.h" // CONFIG_MACH_STM32F1
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#include "can.h" // SHORT_UUID_LEN
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#include "command.h" // DECL_CONSTANT_STR
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#include "fasthash.h" // fasthash64
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#include "generic/armcm_boot.h" // armcm_enable_irq
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#include "generic/serial_irq.h" // serial_rx_byte
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#include "internal.h" // enable_pclock
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#include "sched.h" // DECL_INIT
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#include <string.h>
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#include "can.h"
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#include <fasthash.h>
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#if (CONFIG_CAN_PINS_PA11_PA12)
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DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PA11,PA12");
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#define GPIO_Rx GPIO('A', 11)
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#define GPIO_Tx GPIO('A', 12)
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#if CONFIG_CAN_PINS_PA11_PA12
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DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PA11,PA12");
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#define GPIO_Rx GPIO('A', 11)
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#define GPIO_Tx GPIO('A', 12)
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#endif
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#if (CONFIG_CAN_PINS_PB8_PB9)
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DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PB8,PB9");
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#define GPIO_Rx GPIO('B', 8)
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#define GPIO_Tx GPIO('B', 9)
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#if CONFIG_CAN_PINS_PB8_PB9
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DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PB8,PB9");
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#define GPIO_Rx GPIO('B', 8)
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#define GPIO_Tx GPIO('B', 9)
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#endif
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#if (CONFIG_CAN_PINS_PI8_PH13)
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DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PI8,PH13");
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#define GPIO_Rx GPIO('I', 8)
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#define GPIO_Tx GPIO('H', 13)
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#if CONFIG_CAN_PINS_PI8_PH13
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DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PI8,PH13");
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#define GPIO_Rx GPIO('I', 8)
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#define GPIO_Tx GPIO('H', 13)
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#endif
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#if (CONFIG_CAN_PINS_PB5_PB6)
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DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PB5,PB6");
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#define GPIO_Rx GPIO('B', 5)
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#define GPIO_Tx GPIO('B', 6)
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#if CONFIG_CAN_PINS_PB5_PB6
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DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PB5,PB6");
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#define GPIO_Rx GPIO('B', 5)
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#define GPIO_Tx GPIO('B', 6)
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#endif
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#if (CONFIG_CAN_PINS_PB12_PB13)
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DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PB12,PB13");
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#define GPIO_Rx GPIO('B', 12)
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#define GPIO_Tx GPIO('B', 13)
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#if CONFIG_CAN_PINS_PB12_PB13
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DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PB12,PB13");
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#define GPIO_Rx GPIO('B', 12)
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#define GPIO_Tx GPIO('B', 13)
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#endif
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#if (CONFIG_MACH_STM32F0)
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#define SOC_CAN CAN
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#define CAN_RX0_IRQn CEC_CAN_IRQn
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#define CAN_RX1_IRQn CEC_CAN_IRQn
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#define CAN_TX_IRQn CEC_CAN_IRQn
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#define CAN_SCE_IRQn CEC_CAN_IRQn
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#define CAN_FUNCTION GPIO_FUNCTION(4) // Alternative function mapping number
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#if CONFIG_MACH_STM32F0
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#define SOC_CAN CAN
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#define CAN_RX0_IRQn CEC_CAN_IRQn
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#define CAN_RX1_IRQn CEC_CAN_IRQn
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#define CAN_TX_IRQn CEC_CAN_IRQn
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#define CAN_SCE_IRQn CEC_CAN_IRQn
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#define CAN_FUNCTION GPIO_FUNCTION(4) // Alternative function mapping number
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#endif
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#if (CONFIG_MACH_STM32F1)
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#define SOC_CAN CAN1
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#define CAN_RX0_IRQn CAN1_RX0_IRQn
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#define CAN_RX1_IRQn CAN1_RX1_IRQn
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#define CAN_TX_IRQn CAN1_TX_IRQn
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#define CAN_SCE_IRQn CAN1_SCE_IRQn
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#define CAN_FUNCTION GPIO_FUNCTION(9) // Alternative function mapping number
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#if CONFIG_MACH_STM32F1
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#define SOC_CAN CAN1
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#define CAN_RX0_IRQn CAN1_RX0_IRQn
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#define CAN_RX1_IRQn CAN1_RX1_IRQn
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#define CAN_TX_IRQn CAN1_TX_IRQn
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#define CAN_SCE_IRQn CAN1_SCE_IRQn
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#define CAN_FUNCTION GPIO_FUNCTION(9) // Alternative function mapping number
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#endif
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#if CONFIG_MACH_STM32F4
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#warning CAN on STM32F4 is untested
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#if (CONFIG_CAN_PINS_PA11_PA12 || CONFIG_CAN_PINS_PB8_PB9 \
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|| CONFIG_CAN_PINS_PI8_PH13)
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#define SOC_CAN CAN1
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#define CAN_RX0_IRQn CAN1_RX0_IRQn
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#define CAN_RX1_IRQn CAN1_RX1_IRQn
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#define CAN_TX_IRQn CAN1_TX_IRQn
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#define CAN_SCE_IRQn CAN1_SCE_IRQn
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#elif CONFIG_CAN_PINS_PB5_PB6 || CONFIG_CAN_PINS_PB12_PB13
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#define SOC_CAN CAN2
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#define CAN_RX0_IRQn CAN2_RX0_IRQn
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#define CAN_RX1_IRQn CAN2_RX1_IRQn
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#define CAN_TX_IRQn CAN2_TX_IRQn
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#define CAN_SCE_IRQn CAN2_SCE_IRQn
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#else
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#error Uknown pins for STMF32F4 CAN
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#endif
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#if (CONFIG_MACH_STM32F4)
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#warning CAN on STM32F4 is untested
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#if (CONFIG_CAN_PINS_PA11_PA12 || \
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CONFIG_CAN_PINS_PB8_PB9 || \
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CONFIG_CAN_PINS_PI8_PH13)
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#define SOC_CAN CAN1
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#define CAN_RX0_IRQn CAN1_RX0_IRQn
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#define CAN_RX1_IRQn CAN1_RX1_IRQn
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#define CAN_TX_IRQn CAN1_TX_IRQn
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#define CAN_SCE_IRQn CAN1_SCE_IRQn
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#elif ((CONFIG_CAN_PINS_PB5_PB6 || CONFIG_CAN_PINS_PB12_PB13)
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#define SOC_CAN CAN2
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#define CAN_RX0_IRQn CAN2_RX0_IRQn
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#define CAN_RX1_IRQn CAN2_RX1_IRQn
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#define CAN_TX_IRQn CAN2_TX_IRQn
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#define CAN_SCE_IRQn CAN2_SCE_IRQn
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#else
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#error Uknown pins for STMF32F4 CAN
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#define CAN_FUNCTION GPIO_FUNCTION(9) // Alternative function mapping number
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#endif
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#define CAN_FUNCTION GPIO_FUNCTION(9) // Alternative function mapping number
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#endif
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#ifndef SOC_CAN
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#error No known CAN device for configured MCU
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#error No known CAN device for configured MCU
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#endif
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// TXFP makes packets posted to the TX mboxes transmit in chronologcal order
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// ABOM makes the hardware automatically leave bus-off state
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#define MCR_FLAGS (CAN_MCR_TXFP | CAN_MCR_ABOM)
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@ -99,17 +93,23 @@ DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PB12,PB13");
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static uint16_t MyCanId = 0;
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static int can_find_empty_tx_mbox(void) {
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static int
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can_find_empty_tx_mbox(void)
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{
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uint32_t tsr = SOC_CAN->TSR;
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if(tsr & CAN_TSR_TME0) return 0;
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if(tsr & CAN_TSR_TME1) return 1;
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if(tsr & CAN_TSR_TME2) return 2;
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if (tsr & CAN_TSR_TME0)
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return 0;
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if (tsr & CAN_TSR_TME1)
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return 1;
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if (tsr & CAN_TSR_TME2)
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return 2;
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return -1;
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}
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static void can_transmit_mbox(uint32_t id, int mbox, uint32_t dlc, uint8_t *pkt)
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static void
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can_transmit_mbox(uint32_t id, int mbox, uint32_t dlc, uint8_t *pkt)
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{
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CAN_TxMailBox_TypeDef *mb = &SOC_CAN->sTxMailBox[mbox];
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CAN_TxMailBox_TypeDef *mb = &SOC_CAN->sTxMailBox[mbox];
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/* Set up the Id */
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mb->TIR &= CAN_TI0R_TXRQ;
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mb->TIR |= (id << CAN_TI0R_STID_Pos);
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@ -119,51 +119,54 @@ static void can_transmit_mbox(uint32_t id, int mbox, uint32_t dlc, uint8_t *pkt)
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mb->TDTR |= (dlc & 0xFU);
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/* Set up the data field */
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if(pkt) {
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mb->TDLR = ((uint32_t)pkt[3] << 24) |
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((uint32_t)pkt[2] << 16) |
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((uint32_t)pkt[1] << 8) |
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((uint32_t)pkt[0] << 0);
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mb->TDHR = ((uint32_t)pkt[7] << 24) |
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((uint32_t)pkt[6] << 16) |
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((uint32_t)pkt[5] << 8) |
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((uint32_t)pkt[4] << 0);
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if (pkt) {
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mb->TDLR = (((uint32_t)pkt[3] << 24)
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| ((uint32_t)pkt[2] << 16)
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| ((uint32_t)pkt[1] << 8)
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| ((uint32_t)pkt[0] << 0));
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mb->TDHR = (((uint32_t)pkt[7] << 24)
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| ((uint32_t)pkt[6] << 16)
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| ((uint32_t)pkt[5] << 8)
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| ((uint32_t)pkt[4] << 0));
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}
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/* Request transmission */
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/* Request transmission */
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__sync_synchronize(); // disable write optimization
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mb->TIR |= CAN_TI0R_TXRQ;
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}
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// Blocking transmit function, it can race with the IRQ driven TX handler.
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// This should(tm) not happen
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static void can_transmit(uint32_t id, uint32_t dlc, uint8_t *pkt)
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static void
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can_transmit(uint32_t id, uint32_t dlc, uint8_t *pkt)
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{
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int mbox = -1;
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do {
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mbox = can_find_empty_tx_mbox();
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} while(mbox < 0);
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mbox = can_find_empty_tx_mbox();
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} while (mbox < 0);
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can_transmit_mbox(id, mbox, dlc, pkt);
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}
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// Convert Unique 96-bit value into 48 bit representation
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static void pack_uuid(uint8_t* u)
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static void
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pack_uuid(uint8_t *u)
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{
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uint64_t hash = fasthash64((uint8_t*)UID_BASE, 12, 0xA16231A7);
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memcpy(u, &hash, SHORT_UUID_LEN);
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}
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static void can_uuid_resp(void)
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static void
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can_uuid_resp(void)
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{
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uint8_t short_uuid[SHORT_UUID_LEN];
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pack_uuid(short_uuid);
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can_transmit(PKT_ID_UUID_RESP, SHORT_UUID_LEN, short_uuid);
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}
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static void get_rx_data(uint8_t* buf, unsigned int mbox)
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static void
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get_rx_data(uint8_t *buf, unsigned int mbox)
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{
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uint32_t rdlr = SOC_CAN->sFIFOMailBox[mbox].RDLR;
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buf[0] = (rdlr >> 0) & 0xff;
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@ -178,42 +181,44 @@ static void get_rx_data(uint8_t* buf, unsigned int mbox)
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}
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// Return true if more data is available to send or mailboxes are full
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int CAN_TxIrq(void) {
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static int
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CAN_TxIrq(void)
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{
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int txdata = 1;
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// TODO: We need some kind of error handling?
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while(txdata) {
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while (txdata) {
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int mbox = can_find_empty_tx_mbox();
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if(mbox < 0) {
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if (mbox < 0) {
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// All mboxes full, wait for next IRQ
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return 1;
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}
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int i=0;
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int i;
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uint8_t databuf[8];
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for (;i<8;i++)
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{
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if(serial_get_tx_byte(&(databuf[i])) == -1) {
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for (i=0; i<8; i++) {
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if (serial_get_tx_byte(&(databuf[i])) == -1) {
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txdata = 0;
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break;
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}
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}
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if (i>0) {
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if (i > 0) {
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can_transmit_mbox(MyCanId+1, mbox, i, databuf);
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}
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}
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return txdata;
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}
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void CAN_RxCpltCallback(unsigned int mbox)
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static void
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CAN_RxCpltCallback(unsigned int mbox)
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{
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CAN_FIFOMailBox_TypeDef* mb = &SOC_CAN->sFIFOMailBox[mbox];
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CAN_FIFOMailBox_TypeDef *mb = &SOC_CAN->sFIFOMailBox[mbox];
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uint32_t id = (mb->RIR >> CAN_RI0R_STID_Pos) & 0x7FF;
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uint8_t dlc = mb->RDTR & CAN_RDT0R_DLC;
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uint8_t databuf[8];
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if(!MyCanId) { // If serial not assigned yet
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if(id==PKT_ID_UUID && dlc == 0) {
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if (!MyCanId) { // If serial not assigned yet
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if (id==PKT_ID_UUID && dlc == 0) {
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// Just inform host about my UUID
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can_uuid_resp();
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} else if (id == PKT_ID_SET) {
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@ -239,24 +244,21 @@ void CAN_RxCpltCallback(unsigned int mbox)
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SOC_CAN->FMR &= ~(CAN_FMR_FINIT);
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}
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}
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} else {
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} else {
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if (id == MyCanId) {
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// compare my UUID with packet to check if this packet mine
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if(dlc == 0) {
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if (dlc == 0) {
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// empty packet == ping request
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can_transmit(MyCanId+1, 0, NULL);
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} else {
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get_rx_data(databuf, mbox);
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for(int i=0; i < dlc; i++ ) {
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for (int i=0; i < dlc; i++) {
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serial_rx_byte(databuf[i]);
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}
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}
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}
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else if (id == PKT_ID_UUID && dlc > 0)
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{
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} else if (id == PKT_ID_UUID && dlc > 0) {
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get_rx_data(databuf, mbox);
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if (memcmp(databuf, &MyCanId, 2) == 0)
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{
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if (memcmp(databuf, &MyCanId, 2) == 0) {
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// Reset from host
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NVIC_SystemReset();
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}
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@ -264,45 +266,41 @@ void CAN_RxCpltCallback(unsigned int mbox)
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}
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}
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/**
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* @brief This function handles CAN global interrupts
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*/
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// This function handles CAN global interrupts
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void
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CAN_IRQHandler(void)
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{
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// RX
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if (SOC_CAN->RF0R & CAN_RF0R_FMP0) {
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// Mailbox 0
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while(SOC_CAN->RF0R & CAN_RF0R_FMP0) {
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while (SOC_CAN->RF0R & CAN_RF0R_FMP0) {
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CAN_RxCpltCallback(0);
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SOC_CAN->RF0R |= CAN_RF0R_RFOM0;
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}
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}
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if (SOC_CAN->RF1R & CAN_RF1R_FMP1) {
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// Mailbox 1
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while(SOC_CAN->RF1R & CAN_RF1R_FMP1) {
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while (SOC_CAN->RF1R & CAN_RF1R_FMP1) {
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CAN_RxCpltCallback(1);
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SOC_CAN->RF1R |= CAN_RF1R_RFOM1;
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}
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}
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/* Check Overrun flag for FIFO0 */
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if(SOC_CAN->RF0R & CAN_RF0R_FOVR0)
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{
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if (SOC_CAN->RF0R & CAN_RF0R_FOVR0) {
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/* Clear FIFO0 Overrun Flag */
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SOC_CAN->RF0R |= CAN_RF0R_FOVR0;
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}
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/* Check Overrun flag for FIFO1 */
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if(SOC_CAN->RF1R & CAN_RF1R_FOVR1)
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{
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if (SOC_CAN->RF1R & CAN_RF1R_FOVR1) {
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/* Clear FIFO1 Overrun Flag */
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SOC_CAN->RF1R |= CAN_RF1R_FOVR1;
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}
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// TX
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if(SOC_CAN->IER & CAN_IER_TMEIE) { // TX IRQ enabled
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if(!CAN_TxIrq())
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SOC_CAN->IER &= ~CAN_IER_TMEIE; // Disable TXIRQ
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if (SOC_CAN->IER & CAN_IER_TMEIE) { // TX IRQ enabled
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if (!CAN_TxIrq())
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SOC_CAN->IER &= ~CAN_IER_TMEIE; // Disable TXIRQ
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}
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}
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@ -312,17 +310,15 @@ make_btr(uint32_t sjw, // Sync jump width, ... hmm
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uint32_t time_seg2, // time segment after sample point, 1 .. 8
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uint32_t brp) // Baud rate prescaler, 1 .. 1024
|
||||
{
|
||||
return
|
||||
((uint32_t)(sjw-1)) << CAN_BTR_SJW_Pos
|
||||
| ((uint32_t)(time_seg1-1)) << CAN_BTR_TS1_Pos
|
||||
| ((uint32_t)(time_seg2-1)) << CAN_BTR_TS2_Pos
|
||||
| ((uint32_t)(brp - 1)) << CAN_BTR_BRP_Pos;
|
||||
return (((uint32_t)(sjw-1)) << CAN_BTR_SJW_Pos
|
||||
| ((uint32_t)(time_seg1-1)) << CAN_BTR_TS1_Pos
|
||||
| ((uint32_t)(time_seg2-1)) << CAN_BTR_TS2_Pos
|
||||
| ((uint32_t)(brp - 1)) << CAN_BTR_BRP_Pos);
|
||||
}
|
||||
|
||||
|
||||
static inline const uint32_t
|
||||
compute_btr(uint32_t pclock, uint32_t bitrate) {
|
||||
|
||||
compute_btr(uint32_t pclock, uint32_t bitrate)
|
||||
{
|
||||
/*
|
||||
Some equations:
|
||||
Tpclock = 1 / pclock
|
||||
|
|
@ -343,10 +339,10 @@ compute_btr(uint32_t pclock, uint32_t bitrate) {
|
|||
uint32_t sjw = 2;
|
||||
uint32_t qs;
|
||||
// Find number of time quantas that gives us the exact wanted bit time
|
||||
for(qs = 18; qs > 9; qs --) {
|
||||
for (qs = 18; qs > 9; qs--) {
|
||||
// check that bit_clocks / quantas is an integer
|
||||
uint32_t brp_rem = bit_clocks % qs;
|
||||
if(brp_rem == 0)
|
||||
if (brp_rem == 0)
|
||||
break;
|
||||
}
|
||||
uint32_t brp = bit_clocks / qs;
|
||||
|
|
@ -375,7 +371,8 @@ can_init(void)
|
|||
/* Request initialisation */
|
||||
SOC_CAN->MCR |= CAN_MCR_INRQ;
|
||||
/* Wait the acknowledge */
|
||||
while( !(SOC_CAN->MSR & CAN_MSR_INAK) );
|
||||
while (!(SOC_CAN->MSR & CAN_MSR_INAK))
|
||||
;
|
||||
|
||||
SOC_CAN->MCR |= MCR_FLAGS;
|
||||
SOC_CAN->BTR = btr;
|
||||
|
|
@ -383,7 +380,8 @@ can_init(void)
|
|||
/* Request leave initialisation */
|
||||
SOC_CAN->MCR &= ~(CAN_MCR_INRQ);
|
||||
/* Wait the acknowledge */
|
||||
while( SOC_CAN->MSR & CAN_MSR_INAK );
|
||||
while (SOC_CAN->MSR & CAN_MSR_INAK)
|
||||
;
|
||||
|
||||
/*##-2- Configure the CAN Filter #######################################*/
|
||||
uint32_t filternbrbitpos = (1U) << CAN_FILTER_NUMBER;
|
||||
|
|
@ -398,7 +396,7 @@ can_init(void)
|
|||
SOC_CAN->sFilterRegister[CAN_FILTER_NUMBER].FR2 =
|
||||
((uint32_t)(PKT_ID_SET<<5) << 16U);
|
||||
|
||||
/*Identifier list mode for the filter*/
|
||||
/* Identifier list mode for the filter */
|
||||
SOC_CAN->FM1R |= filternbrbitpos;
|
||||
/* 32-bit scale for the filter */
|
||||
SOC_CAN->FS1R |= filternbrbitpos;
|
||||
|
|
@ -416,13 +414,12 @@ can_init(void)
|
|||
SOC_CAN->IER |= (CAN_IER_FMPIE0 | CAN_IER_FMPIE1); // RX mailbox IRQ
|
||||
|
||||
armcm_enable_irq(CAN_IRQHandler, CAN_RX0_IRQn, 0);
|
||||
if(CAN_RX0_IRQn != CAN_RX1_IRQn)
|
||||
armcm_enable_irq(CAN_IRQHandler, CAN_RX1_IRQn, 0);
|
||||
if(CAN_RX0_IRQn != CAN_TX_IRQn)
|
||||
armcm_enable_irq(CAN_IRQHandler, CAN_TX_IRQn, 0);
|
||||
if (CAN_RX0_IRQn != CAN_RX1_IRQn)
|
||||
armcm_enable_irq(CAN_IRQHandler, CAN_RX1_IRQn, 0);
|
||||
if (CAN_RX0_IRQn != CAN_TX_IRQn)
|
||||
armcm_enable_irq(CAN_IRQHandler, CAN_TX_IRQn, 0);
|
||||
// TODO: CAN_SCE_IRQ?n
|
||||
|
||||
|
||||
/*##-4- Say Hello #################################*/
|
||||
can_uuid_resp();
|
||||
}
|
||||
|
|
@ -431,7 +428,7 @@ DECL_INIT(can_init);
|
|||
void
|
||||
serial_enable_tx_irq(void)
|
||||
{
|
||||
if(MyCanId == 0)
|
||||
if (MyCanId == 0)
|
||||
// Serial port not initialized
|
||||
return;
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue