From 8d029ad652f996e333ca08921cd7f92d9416c196 Mon Sep 17 00:00:00 2001 From: Kevin O'Connor Date: Wed, 19 Jun 2019 20:48:08 -0400 Subject: [PATCH] lpc176x: Fix adc clock divisor Commit 1096075d changed CONFIG_CLOCK_FREQ to the actual cpu frequency, but that commit failed to update adc.c accordingly. That made the adc run 4 times slower. Make the corresponding change to adc.c. Signed-off-by: Kevin O'Connor --- src/lpc176x/adc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/lpc176x/adc.c b/src/lpc176x/adc.c index 1f5fbbde..26965fb2 100644 --- a/src/lpc176x/adc.c +++ b/src/lpc176x/adc.c @@ -51,7 +51,7 @@ gpio_adc_setup(uint8_t pin) if (!is_enabled_pclock(PCLK_ADC)) { // Power up ADC enable_pclock(PCLK_ADC); - uint32_t prescal = DIV_ROUND_UP(CONFIG_CLOCK_FREQ*4, ADC_FREQ_MAX) - 1; + uint32_t prescal = DIV_ROUND_UP(CONFIG_CLOCK_FREQ, ADC_FREQ_MAX) - 1; LPC_ADC->ADCR = adc_status.adcr = (1<<21) | ((prescal & 0xff) << 8); LPC_ADC->ADINTEN = 0xff; adc_status.chan = ADC_DONE; @@ -104,7 +104,7 @@ gpio_adc_sample(struct gpio_adc g) LPC_ADC->ADCR = adc_status.adcr | (1 << g.chan) | (1<<16); need_delay: - return ((64 * DIV_ROUND_UP(CONFIG_CLOCK_FREQ*4, ADC_FREQ_MAX) + return ((64 * DIV_ROUND_UP(CONFIG_CLOCK_FREQ, ADC_FREQ_MAX) * ARRAY_SIZE(adc_status.samples)) / 4 + timer_from_us(10)); }