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stm32f1: It's only necessary to program the CR1 register during SPI init 

Only set the CR1 register during spi_prepare().

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
This commit is contained in:
Kevin O'Connor 2018-12-30 22:38:31 -05:00
parent c8e04274ad
commit 6e18af7057
3 changed files with 9 additions and 11 deletions
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2
src/stm32f1/gpio.h
View File

@ -33,7 +33,7 @@ uint16_t gpio_adc_read(struct gpio_adc g);
void gpio_adc_cancel_sample(struct gpio_adc g);
struct spi_config {
SPI_TypeDef config;
uint32_t spi_cr1;
};
struct spi_config spi_setup(uint32_t bus, uint8_t mode, uint32_t rate);
void spi_prepare(struct spi_config config);

2
src/stm32f1/main.c
View File

@ -112,8 +112,6 @@ void adc_config(void)
void spi_config(void)
{
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI2);
LL_SPI_SetNSSMode(SPI2, LL_SPI_NSS_SOFT);
LL_SPI_SetMode(SPI2, LL_SPI_MODE_MASTER);
}
void io_config(void)

16
src/stm32f1/spi.c
View File

@ -70,24 +70,24 @@ static void spi_init_pins(void)
struct spi_config
spi_setup(uint32_t bus, uint8_t mode, uint32_t rate)
{
struct spi_config config;
config.config = *SPI2;
if (bus > 0 || !rate)
shutdown("Invalid spi_setup parameters");
spi_init_pins();
spi_set_mode(&config.config, mode);
spi_set_baudrate(&config.config, rate);
SPI_TypeDef spi_hw = { };
LL_SPI_SetNSSMode(&spi_hw, LL_SPI_NSS_SOFT);
LL_SPI_SetMode(&spi_hw, LL_SPI_MODE_MASTER);
spi_set_mode(&spi_hw, mode);
spi_set_baudrate(&spi_hw, rate);
LL_SPI_Enable(&spi_hw);
return config;
return (struct spi_config){ .spi_cr1 = spi_hw.CR1 };
}
void
spi_prepare(struct spi_config config)
{
*SPI2 = config.config;
LL_SPI_Enable(SPI2);
SPI2->CR1 = config.spi_cr1;
}
void