atsam: Wrap code to 80 columns
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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2d99a1e802
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5a74549ef6
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@ -179,7 +179,8 @@ gpio_adc_sample(struct gpio_adc g)
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afec->AFE_CR = AFE_CR_START;
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need_delay:
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return ADC_FREQ_MAX * 10000ULL / CONFIG_CLOCK_FREQ; // about 400 mcu clock cycles or 40 afec cycles
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// about 400 mcu clock cycles or 40 afec cycles
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return ADC_FREQ_MAX * 10000ULL / CONFIG_CLOCK_FREQ;
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}
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// Read a value; use only after gpio_adc_sample() returns zero
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@ -11,7 +11,8 @@
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| CKGR_PLLAR_DIVA(0x1U))
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#define SYS_BOARD_MCKR (PMC_MCKR_PRES_CLK_2 | PMC_MCKR_CSS_PLLA_CLK)
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#define SYS_CKGR_MOR_KEY_VALUE CKGR_MOR_KEY(0x37) /* Key to unlock MOR register */
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/* Key to unlock MOR register */
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#define SYS_CKGR_MOR_KEY_VALUE CKGR_MOR_KEY(0x37)
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uint32_t SystemCoreClock = CHIP_FREQ_MAINCK_RC_4MHZ;
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@ -23,7 +24,8 @@ void SystemInit( void )
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/* Initialize main oscillator */
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if ( !(PMC->CKGR_MOR & CKGR_MOR_MOSCSEL) )
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{
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PMC->CKGR_MOR = SYS_CKGR_MOR_KEY_VALUE | SYS_BOARD_OSCOUNT | CKGR_MOR_MOSCRCEN | CKGR_MOR_MOSCXTEN;
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PMC->CKGR_MOR = (SYS_CKGR_MOR_KEY_VALUE | SYS_BOARD_OSCOUNT
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| CKGR_MOR_MOSCRCEN | CKGR_MOR_MOSCXTEN);
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while ( !(PMC->PMC_SR & PMC_SR_MOSCXTS) )
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{
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@ -31,13 +33,16 @@ void SystemInit( void )
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}
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/* Switch to 3-20MHz Xtal oscillator */
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PMC->CKGR_MOR = SYS_CKGR_MOR_KEY_VALUE | SYS_BOARD_OSCOUNT | CKGR_MOR_MOSCRCEN | CKGR_MOR_MOSCXTEN | CKGR_MOR_MOSCSEL;
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PMC->CKGR_MOR = (SYS_CKGR_MOR_KEY_VALUE | SYS_BOARD_OSCOUNT
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| CKGR_MOR_MOSCRCEN | CKGR_MOR_MOSCXTEN
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| CKGR_MOR_MOSCSEL);
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while ( !(PMC->PMC_SR & PMC_SR_MOSCSELS) )
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{
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}
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PMC->PMC_MCKR = (PMC->PMC_MCKR & ~(uint32_t)PMC_MCKR_CSS_Msk) | PMC_MCKR_CSS_MAIN_CLK;
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PMC->PMC_MCKR = ((PMC->PMC_MCKR & ~(uint32_t)PMC_MCKR_CSS_Msk)
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| PMC_MCKR_CSS_MAIN_CLK);
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while ( !(PMC->PMC_SR & PMC_SR_MCKRDY) )
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{
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@ -50,7 +55,8 @@ void SystemInit( void )
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}
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/* Switch to main clock */
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PMC->PMC_MCKR = (SYS_BOARD_MCKR & ~PMC_MCKR_CSS_Msk) | PMC_MCKR_CSS_MAIN_CLK;
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PMC->PMC_MCKR = ((SYS_BOARD_MCKR & ~PMC_MCKR_CSS_Msk)
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| PMC_MCKR_CSS_MAIN_CLK);
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while ( !(PMC->PMC_SR & PMC_SR_MCKRDY) )
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{
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}
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