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stm32: Update code to use armcm_boot mechanism 

Replace the stm32 provided assembler with the src/generic/armcm_boot.c
mechanism.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
This commit is contained in:
Kevin O'Connor 2019-08-21 13:52:43 -04:00
parent a44bc950a3
commit 4ef53ab095
7 changed files with 24 additions and 111 deletions
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12
src/stm32/Kconfig
View File

@ -62,6 +62,10 @@ config FLASH_SIZE
default 0x10000 if MACH_STM32F103
default 0x80000 if MACH_STM32F4
config RAM_START
hex
default 0x20000000
config RAM_SIZE
hex
default 0x5000 if MACH_STM32F103
@ -84,10 +88,10 @@ choice
endchoice
config FLASH_START
hex
default 0x2000 if STM32_FLASH_START_2000
default 0x7000 if STM32_FLASH_START_7000
default 0x8000 if STM32_FLASH_START_8000
default 0x0000
default 0x8002000 if STM32_FLASH_START_2000
default 0x8007000 if STM32_FLASH_START_7000
default 0x8008000 if STM32_FLASH_START_8000
default 0x8000000
choice
prompt "Clock Reference" if LOW_LEVEL_OPTIONS

19
src/stm32/Makefile
View File

@ -4,8 +4,8 @@
CROSS_PREFIX=arm-none-eabi-
dirs-y += src/stm32 src/generic
dirs-$(CONFIG_MACH_STM32F1) += lib/stm32f1 lib/stm32f1/gcc
dirs-$(CONFIG_MACH_STM32F4) += lib/stm32f4 lib/stm32f4/gcc
dirs-$(CONFIG_MACH_STM32F1) += lib/stm32f1
dirs-$(CONFIG_MACH_STM32F4) += lib/stm32f4
MCU := $(shell echo $(CONFIG_MCU))
MCU_UPPER := $(shell echo $(CONFIG_MCU) | tr a-z A-Z | tr X x)
@ -16,11 +16,11 @@ CFLAGS-$(CONFIG_MACH_STM32F4) += -mfpu=fpv4-sp-d16 -mfloat-abi=hard
CFLAGS += $(CFLAGS-y) -D$(MCU_UPPER) -mthumb -Ilib/cmsis-core
CFLAGS_klipper.elf += --specs=nano.specs --specs=nosys.specs
CFLAGS_klipper.elf += -T $(OUT)src/stm32/stm32.ld
$(OUT)klipper.elf: $(OUT)src/stm32/stm32.ld
CFLAGS_klipper.elf += -T $(OUT)src/generic/armcm_boot.ld
$(OUT)klipper.elf: $(OUT)src/generic/armcm_boot.ld
# Add source files
src-y += stm32/main.c stm32/watchdog.c stm32/gpio.c
src-y += stm32/main.c stm32/watchdog.c stm32/gpio.c generic/armcm_boot.c
src-y += generic/crc16_ccitt.c generic/armcm_irq.c generic/armcm_timer.c
src-$(CONFIG_MACH_STM32F1) += ../lib/stm32f1/system_stm32f1xx.c
src-$(CONFIG_MACH_STM32F1) += stm32/stm32f1.c
@ -34,15 +34,6 @@ usb-src-$(CONFIG_HAVE_STM32_USBOTG) := stm32/usbotg.c
src-$(CONFIG_USBSERIAL) += $(usb-src-y) generic/usb_cdc.c
src-$(CONFIG_SERIAL) += stm32/serial.c generic/serial_irq.c
# Add assembler build rules
$(OUT)%.o: %.s $(OUT)autoconf.h $(OUT)board-link
@echo " Assembling $@"
$(Q)$(AS) $< -o $@
asmsrc-$(CONFIG_MACH_STM32F1) := ../lib/stm32f1/gcc/startup_$(MCU).s
asmsrc-$(CONFIG_MACH_STM32F4) := ../lib/stm32f4/gcc/startup_$(MCU).s
OBJS_klipper.elf += $(patsubst %.s, $(OUT)src/%.o,$(asmsrc-y))
# Binary output file rules
target-y += $(OUT)klipper.bin

19
src/stm32/main.c
View File

@ -5,28 +5,13 @@
// This file may be distributed under the terms of the GNU GPLv3 license.
#include "autoconf.h" // CONFIG_MCU
#include "board/armcm_boot.h" // VectorTable
#include "command.h" // DECL_CONSTANT_STR
#include "internal.h" // clock_setup
#include "sched.h" // sched_main
DECL_CONSTANT_STR("MCU", CONFIG_MCU);
// Return the start of memory available for dynamic allocations
void *
dynmem_start(void)
{
extern uint32_t _ebss;
return &_ebss;
}
// Return the end of memory available for dynamic allocations
void *
dynmem_end(void)
{
extern uint32_t _sstack;
return &_sstack;
}
void
command_reset(uint32_t *args)
{
@ -38,7 +23,7 @@ DECL_COMMAND_FLAGS(command_reset, HF_IN_SHUTDOWN, "reset");
int
main(void)
{
SCB->VTOR += CONFIG_FLASH_START;
SCB->VTOR = (uint32_t)VectorTable;
clock_setup();

10
src/stm32/serial.c
View File

@ -5,6 +5,7 @@
// This file may be distributed under the terms of the GNU GPLv3 license.
#include "autoconf.h" // CONFIG_SERIAL_BAUD
#include "board/armcm_boot.h" // armcm_enable_irq
#include "board/serial_irq.h" // serial_rx_byte
#include "command.h" // DECL_CONSTANT_STR
#include "internal.h" // enable_pclock
@ -17,34 +18,30 @@ DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA10,PA9");
#define GPIO_Tx GPIO('A', 9)
#define USARTx USART1
#define USARTx_IRQn USART1_IRQn
#define USARTx_IRQHandler USART1_IRQHandler
#elif CONFIG_SERIAL_PORT == 2
DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA3,PA2");
#define GPIO_Rx GPIO('A', 3)
#define GPIO_Tx GPIO('A', 2)
#define USARTx USART2
#define USARTx_IRQn USART2_IRQn
#define USARTx_IRQHandler USART2_IRQHandler
#elif CONFIG_SERIAL_PORT == 103
DECL_CONSTANT_STR("RESERVE_PINS_serial", "PD9,PD8");
#define GPIO_Rx GPIO('D', 9)
#define GPIO_Tx GPIO('D', 8)
#define USARTx USART3
#define USARTx_IRQn USART3_IRQn
#define USARTx_IRQHandler USART3_IRQHandler
#else
DECL_CONSTANT_STR("RESERVE_PINS_serial", "PB11,PB10");
#define GPIO_Rx GPIO('B', 11)
#define GPIO_Tx GPIO('B', 10)
#define USARTx USART3
#define USARTx_IRQn USART3_IRQn
#define USARTx_IRQHandler USART3_IRQHandler
#endif
#define CR1_FLAGS (USART_CR1_UE | USART_CR1_RE | USART_CR1_TE \
| USART_CR1_RXNEIE)
void __visible
void
USARTx_IRQHandler(void)
{
uint32_t sr = USARTx->SR;
@ -76,8 +73,7 @@ serial_init(void)
USARTx->BRR = (((div / 16) << USART_BRR_DIV_Mantissa_Pos)
| ((div % 16) << USART_BRR_DIV_Fraction_Pos));
USARTx->CR1 = CR1_FLAGS;
NVIC_SetPriority(USARTx_IRQn, 0);
NVIC_EnableIRQ(USARTx_IRQn);
armcm_enable_irq(USARTx_IRQHandler, USARTx_IRQn, 0);
gpio_peripheral(GPIO_Rx, GPIO_FUNCTION(7), 1);
gpio_peripheral(GPIO_Tx, GPIO_FUNCTION(7), 0);

63
src/stm32/stm32.lds.S
View File

@ -1,63 +0,0 @@
/* Linker script for stm32f4 chips
*
* Copyright (C) 2019 Kevin O'Connor <kevin@koconnor.net>
*
* This file may be distributed under the terms of the GNU GPLv3 license.
*/
#include "autoconf.h"
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
MEMORY
{
rom (rx) : ORIGIN = 0x8000000 + CONFIG_FLASH_START , LENGTH = CONFIG_FLASH_SIZE
ram (rwx) : ORIGIN = 0x20000000, LENGTH = CONFIG_RAM_SIZE
}
SECTIONS
{
.text : {
. = ALIGN(4);
_sfixed = .;
KEEP(*(.isr_vector))
*(.text .text.*)
*(.rodata .rodata*)
. = ALIGN(4);
KEEP(*(.init))
. = ALIGN(4);
KEEP(*(.fini))
} > rom
. = ALIGN(4);
_sidata = .;
.data : AT (_sidata)
{
. = ALIGN(4);
_sdata = .;
*(.ramfunc .ramfunc.*);
*(.data .data.*);
. = ALIGN(4);
_edata = .;
} > ram
.bss (NOLOAD) :
{
. = ALIGN(4);
_sbss = .;
*(.bss .bss.*)
*(COMMON)
. = ALIGN(4);
_ebss = .;
} > ram
_sstack = 0x20000000 + CONFIG_RAM_SIZE - CONFIG_STACK_SIZE ;
.stack _sstack (NOLOAD) :
{
. = . + CONFIG_STACK_SIZE;
_estack = .;
} > ram
}

6
src/stm32/usbfs.c
View File

@ -6,6 +6,7 @@
#include <string.h> // NULL
#include "autoconf.h" // CONFIG_STM32_FLASH_START_2000
#include "board/armcm_boot.h" // armcm_enable_irq
#include "board/armcm_timer.h" // udelay
#include "board/gpio.h" // gpio_out_setup
#include "board/io.h" // writeb
@ -249,7 +250,7 @@ usb_reset(void)
}
// Main irq handler
void __visible
void
USB_LP_CAN1_RX0_IRQHandler(void)
{
uint32_t istr = USB->ISTR;
@ -301,7 +302,6 @@ usb_init(void)
USB->DADDR = 0;
USB->CNTR = USB_CNTR_RESETM;
USB->ISTR = 0;
NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, 1);
NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn);
armcm_enable_irq(USB_LP_CAN1_RX0_IRQHandler, USB_LP_CAN1_RX0_IRQn, 1);
}
DECL_INIT(usb_init);

6
src/stm32/usbotg.c
View File

@ -6,6 +6,7 @@
#include <string.h> // NULL
#include "autoconf.h" // CONFIG_MACH_STM32F446
#include "board/armcm_boot.h" // armcm_enable_irq
#include "board/io.h" // writel
#include "board/usb_cdc.h" // usb_notify_ep0
#include "board/usb_cdc_ep.h" // USB_CDC_EP_BULK_IN
@ -323,7 +324,7 @@ usb_suspend(void)
}
// Main irq handler
void __visible
void
OTG_FS_IRQHandler(void)
{
uint32_t sts = OTG->GINTSTS;
@ -388,8 +389,7 @@ usb_init(void)
OTG->GINTMSK = (USB_OTG_GINTMSK_USBRST | USB_OTG_GINTSTS_USBSUSP
| USB_OTG_GINTMSK_RXFLVLM | USB_OTG_GINTMSK_IEPINT);
OTG->GAHBCFG = USB_OTG_GAHBCFG_GINT;
NVIC_SetPriority(OTG_FS_IRQn, 1);
NVIC_EnableIRQ(OTG_FS_IRQn);
armcm_enable_irq(OTG_FS_IRQHandler, OTG_FS_IRQn, 1);
// Enable USB
OTG->GCCFG |= USB_OTG_GCCFG_PWRDWN;