stm32: Update code to use armcm_boot mechanism
Replace the stm32 provided assembler with the src/generic/armcm_boot.c mechanism. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
This commit is contained in:
parent
a44bc950a3
commit
4ef53ab095
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@ -62,6 +62,10 @@ config FLASH_SIZE
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default 0x10000 if MACH_STM32F103
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default 0x10000 if MACH_STM32F103
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default 0x80000 if MACH_STM32F4
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default 0x80000 if MACH_STM32F4
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config RAM_START
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hex
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default 0x20000000
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config RAM_SIZE
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config RAM_SIZE
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hex
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hex
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default 0x5000 if MACH_STM32F103
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default 0x5000 if MACH_STM32F103
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@ -84,10 +88,10 @@ choice
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endchoice
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endchoice
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config FLASH_START
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config FLASH_START
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hex
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hex
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default 0x2000 if STM32_FLASH_START_2000
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default 0x8002000 if STM32_FLASH_START_2000
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default 0x7000 if STM32_FLASH_START_7000
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default 0x8007000 if STM32_FLASH_START_7000
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default 0x8000 if STM32_FLASH_START_8000
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default 0x8008000 if STM32_FLASH_START_8000
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default 0x0000
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default 0x8000000
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choice
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choice
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prompt "Clock Reference" if LOW_LEVEL_OPTIONS
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prompt "Clock Reference" if LOW_LEVEL_OPTIONS
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@ -4,8 +4,8 @@
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CROSS_PREFIX=arm-none-eabi-
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CROSS_PREFIX=arm-none-eabi-
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dirs-y += src/stm32 src/generic
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dirs-y += src/stm32 src/generic
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dirs-$(CONFIG_MACH_STM32F1) += lib/stm32f1 lib/stm32f1/gcc
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dirs-$(CONFIG_MACH_STM32F1) += lib/stm32f1
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dirs-$(CONFIG_MACH_STM32F4) += lib/stm32f4 lib/stm32f4/gcc
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dirs-$(CONFIG_MACH_STM32F4) += lib/stm32f4
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MCU := $(shell echo $(CONFIG_MCU))
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MCU := $(shell echo $(CONFIG_MCU))
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MCU_UPPER := $(shell echo $(CONFIG_MCU) | tr a-z A-Z | tr X x)
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MCU_UPPER := $(shell echo $(CONFIG_MCU) | tr a-z A-Z | tr X x)
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@ -16,11 +16,11 @@ CFLAGS-$(CONFIG_MACH_STM32F4) += -mfpu=fpv4-sp-d16 -mfloat-abi=hard
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CFLAGS += $(CFLAGS-y) -D$(MCU_UPPER) -mthumb -Ilib/cmsis-core
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CFLAGS += $(CFLAGS-y) -D$(MCU_UPPER) -mthumb -Ilib/cmsis-core
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CFLAGS_klipper.elf += --specs=nano.specs --specs=nosys.specs
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CFLAGS_klipper.elf += --specs=nano.specs --specs=nosys.specs
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CFLAGS_klipper.elf += -T $(OUT)src/stm32/stm32.ld
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CFLAGS_klipper.elf += -T $(OUT)src/generic/armcm_boot.ld
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$(OUT)klipper.elf: $(OUT)src/stm32/stm32.ld
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$(OUT)klipper.elf: $(OUT)src/generic/armcm_boot.ld
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# Add source files
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# Add source files
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src-y += stm32/main.c stm32/watchdog.c stm32/gpio.c
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src-y += stm32/main.c stm32/watchdog.c stm32/gpio.c generic/armcm_boot.c
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src-y += generic/crc16_ccitt.c generic/armcm_irq.c generic/armcm_timer.c
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src-y += generic/crc16_ccitt.c generic/armcm_irq.c generic/armcm_timer.c
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src-$(CONFIG_MACH_STM32F1) += ../lib/stm32f1/system_stm32f1xx.c
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src-$(CONFIG_MACH_STM32F1) += ../lib/stm32f1/system_stm32f1xx.c
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src-$(CONFIG_MACH_STM32F1) += stm32/stm32f1.c
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src-$(CONFIG_MACH_STM32F1) += stm32/stm32f1.c
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@ -34,15 +34,6 @@ usb-src-$(CONFIG_HAVE_STM32_USBOTG) := stm32/usbotg.c
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src-$(CONFIG_USBSERIAL) += $(usb-src-y) generic/usb_cdc.c
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src-$(CONFIG_USBSERIAL) += $(usb-src-y) generic/usb_cdc.c
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src-$(CONFIG_SERIAL) += stm32/serial.c generic/serial_irq.c
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src-$(CONFIG_SERIAL) += stm32/serial.c generic/serial_irq.c
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# Add assembler build rules
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$(OUT)%.o: %.s $(OUT)autoconf.h $(OUT)board-link
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@echo " Assembling $@"
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$(Q)$(AS) $< -o $@
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asmsrc-$(CONFIG_MACH_STM32F1) := ../lib/stm32f1/gcc/startup_$(MCU).s
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asmsrc-$(CONFIG_MACH_STM32F4) := ../lib/stm32f4/gcc/startup_$(MCU).s
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OBJS_klipper.elf += $(patsubst %.s, $(OUT)src/%.o,$(asmsrc-y))
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# Binary output file rules
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# Binary output file rules
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target-y += $(OUT)klipper.bin
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target-y += $(OUT)klipper.bin
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@ -5,28 +5,13 @@
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// This file may be distributed under the terms of the GNU GPLv3 license.
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// This file may be distributed under the terms of the GNU GPLv3 license.
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#include "autoconf.h" // CONFIG_MCU
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#include "autoconf.h" // CONFIG_MCU
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#include "board/armcm_boot.h" // VectorTable
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#include "command.h" // DECL_CONSTANT_STR
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#include "command.h" // DECL_CONSTANT_STR
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#include "internal.h" // clock_setup
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#include "internal.h" // clock_setup
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#include "sched.h" // sched_main
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#include "sched.h" // sched_main
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DECL_CONSTANT_STR("MCU", CONFIG_MCU);
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DECL_CONSTANT_STR("MCU", CONFIG_MCU);
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// Return the start of memory available for dynamic allocations
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void *
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dynmem_start(void)
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{
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extern uint32_t _ebss;
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return &_ebss;
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}
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// Return the end of memory available for dynamic allocations
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void *
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dynmem_end(void)
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{
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extern uint32_t _sstack;
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return &_sstack;
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}
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void
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void
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command_reset(uint32_t *args)
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command_reset(uint32_t *args)
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{
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{
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@ -38,7 +23,7 @@ DECL_COMMAND_FLAGS(command_reset, HF_IN_SHUTDOWN, "reset");
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int
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int
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main(void)
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main(void)
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{
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{
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SCB->VTOR += CONFIG_FLASH_START;
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SCB->VTOR = (uint32_t)VectorTable;
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clock_setup();
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clock_setup();
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@ -5,6 +5,7 @@
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// This file may be distributed under the terms of the GNU GPLv3 license.
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// This file may be distributed under the terms of the GNU GPLv3 license.
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#include "autoconf.h" // CONFIG_SERIAL_BAUD
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#include "autoconf.h" // CONFIG_SERIAL_BAUD
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#include "board/armcm_boot.h" // armcm_enable_irq
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#include "board/serial_irq.h" // serial_rx_byte
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#include "board/serial_irq.h" // serial_rx_byte
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#include "command.h" // DECL_CONSTANT_STR
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#include "command.h" // DECL_CONSTANT_STR
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#include "internal.h" // enable_pclock
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#include "internal.h" // enable_pclock
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@ -17,34 +18,30 @@ DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA10,PA9");
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#define GPIO_Tx GPIO('A', 9)
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#define GPIO_Tx GPIO('A', 9)
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#define USARTx USART1
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#define USARTx USART1
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#define USARTx_IRQn USART1_IRQn
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#define USARTx_IRQn USART1_IRQn
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#define USARTx_IRQHandler USART1_IRQHandler
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#elif CONFIG_SERIAL_PORT == 2
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#elif CONFIG_SERIAL_PORT == 2
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DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA3,PA2");
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DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA3,PA2");
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#define GPIO_Rx GPIO('A', 3)
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#define GPIO_Rx GPIO('A', 3)
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#define GPIO_Tx GPIO('A', 2)
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#define GPIO_Tx GPIO('A', 2)
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#define USARTx USART2
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#define USARTx USART2
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#define USARTx_IRQn USART2_IRQn
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#define USARTx_IRQn USART2_IRQn
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#define USARTx_IRQHandler USART2_IRQHandler
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#elif CONFIG_SERIAL_PORT == 103
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#elif CONFIG_SERIAL_PORT == 103
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DECL_CONSTANT_STR("RESERVE_PINS_serial", "PD9,PD8");
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DECL_CONSTANT_STR("RESERVE_PINS_serial", "PD9,PD8");
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#define GPIO_Rx GPIO('D', 9)
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#define GPIO_Rx GPIO('D', 9)
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#define GPIO_Tx GPIO('D', 8)
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#define GPIO_Tx GPIO('D', 8)
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#define USARTx USART3
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#define USARTx USART3
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#define USARTx_IRQn USART3_IRQn
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#define USARTx_IRQn USART3_IRQn
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#define USARTx_IRQHandler USART3_IRQHandler
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#else
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#else
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DECL_CONSTANT_STR("RESERVE_PINS_serial", "PB11,PB10");
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DECL_CONSTANT_STR("RESERVE_PINS_serial", "PB11,PB10");
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#define GPIO_Rx GPIO('B', 11)
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#define GPIO_Rx GPIO('B', 11)
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#define GPIO_Tx GPIO('B', 10)
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#define GPIO_Tx GPIO('B', 10)
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#define USARTx USART3
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#define USARTx USART3
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#define USARTx_IRQn USART3_IRQn
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#define USARTx_IRQn USART3_IRQn
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#define USARTx_IRQHandler USART3_IRQHandler
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#endif
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#endif
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#define CR1_FLAGS (USART_CR1_UE | USART_CR1_RE | USART_CR1_TE \
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#define CR1_FLAGS (USART_CR1_UE | USART_CR1_RE | USART_CR1_TE \
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| USART_CR1_RXNEIE)
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| USART_CR1_RXNEIE)
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void __visible
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void
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USARTx_IRQHandler(void)
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USARTx_IRQHandler(void)
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{
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{
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uint32_t sr = USARTx->SR;
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uint32_t sr = USARTx->SR;
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@ -76,8 +73,7 @@ serial_init(void)
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USARTx->BRR = (((div / 16) << USART_BRR_DIV_Mantissa_Pos)
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USARTx->BRR = (((div / 16) << USART_BRR_DIV_Mantissa_Pos)
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| ((div % 16) << USART_BRR_DIV_Fraction_Pos));
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| ((div % 16) << USART_BRR_DIV_Fraction_Pos));
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USARTx->CR1 = CR1_FLAGS;
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USARTx->CR1 = CR1_FLAGS;
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NVIC_SetPriority(USARTx_IRQn, 0);
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armcm_enable_irq(USARTx_IRQHandler, USARTx_IRQn, 0);
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NVIC_EnableIRQ(USARTx_IRQn);
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gpio_peripheral(GPIO_Rx, GPIO_FUNCTION(7), 1);
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gpio_peripheral(GPIO_Rx, GPIO_FUNCTION(7), 1);
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gpio_peripheral(GPIO_Tx, GPIO_FUNCTION(7), 0);
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gpio_peripheral(GPIO_Tx, GPIO_FUNCTION(7), 0);
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@ -1,63 +0,0 @@
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/* Linker script for stm32f4 chips
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*
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* Copyright (C) 2019 Kevin O'Connor <kevin@koconnor.net>
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*
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* This file may be distributed under the terms of the GNU GPLv3 license.
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*/
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#include "autoconf.h"
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OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
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OUTPUT_ARCH(arm)
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MEMORY
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{
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rom (rx) : ORIGIN = 0x8000000 + CONFIG_FLASH_START , LENGTH = CONFIG_FLASH_SIZE
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ram (rwx) : ORIGIN = 0x20000000, LENGTH = CONFIG_RAM_SIZE
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}
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SECTIONS
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{
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.text : {
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. = ALIGN(4);
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_sfixed = .;
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KEEP(*(.isr_vector))
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*(.text .text.*)
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*(.rodata .rodata*)
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. = ALIGN(4);
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KEEP(*(.init))
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. = ALIGN(4);
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KEEP(*(.fini))
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} > rom
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. = ALIGN(4);
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_sidata = .;
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.data : AT (_sidata)
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{
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. = ALIGN(4);
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_sdata = .;
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*(.ramfunc .ramfunc.*);
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*(.data .data.*);
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. = ALIGN(4);
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_edata = .;
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} > ram
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.bss (NOLOAD) :
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{
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. = ALIGN(4);
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_sbss = .;
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*(.bss .bss.*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = .;
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} > ram
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_sstack = 0x20000000 + CONFIG_RAM_SIZE - CONFIG_STACK_SIZE ;
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.stack _sstack (NOLOAD) :
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{
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. = . + CONFIG_STACK_SIZE;
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_estack = .;
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} > ram
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}
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@ -6,6 +6,7 @@
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#include <string.h> // NULL
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#include <string.h> // NULL
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#include "autoconf.h" // CONFIG_STM32_FLASH_START_2000
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#include "autoconf.h" // CONFIG_STM32_FLASH_START_2000
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#include "board/armcm_boot.h" // armcm_enable_irq
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#include "board/armcm_timer.h" // udelay
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#include "board/armcm_timer.h" // udelay
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#include "board/gpio.h" // gpio_out_setup
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#include "board/gpio.h" // gpio_out_setup
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#include "board/io.h" // writeb
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#include "board/io.h" // writeb
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@ -249,7 +250,7 @@ usb_reset(void)
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}
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}
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// Main irq handler
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// Main irq handler
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void __visible
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void
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USB_LP_CAN1_RX0_IRQHandler(void)
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USB_LP_CAN1_RX0_IRQHandler(void)
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{
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{
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uint32_t istr = USB->ISTR;
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uint32_t istr = USB->ISTR;
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USB->DADDR = 0;
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USB->DADDR = 0;
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USB->CNTR = USB_CNTR_RESETM;
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USB->CNTR = USB_CNTR_RESETM;
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USB->ISTR = 0;
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USB->ISTR = 0;
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NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, 1);
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armcm_enable_irq(USB_LP_CAN1_RX0_IRQHandler, USB_LP_CAN1_RX0_IRQn, 1);
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NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn);
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}
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}
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DECL_INIT(usb_init);
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DECL_INIT(usb_init);
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#include <string.h> // NULL
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#include <string.h> // NULL
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#include "autoconf.h" // CONFIG_MACH_STM32F446
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#include "autoconf.h" // CONFIG_MACH_STM32F446
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#include "board/armcm_boot.h" // armcm_enable_irq
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#include "board/io.h" // writel
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#include "board/io.h" // writel
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#include "board/usb_cdc.h" // usb_notify_ep0
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#include "board/usb_cdc.h" // usb_notify_ep0
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#include "board/usb_cdc_ep.h" // USB_CDC_EP_BULK_IN
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#include "board/usb_cdc_ep.h" // USB_CDC_EP_BULK_IN
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}
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}
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// Main irq handler
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// Main irq handler
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void __visible
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void
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OTG_FS_IRQHandler(void)
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OTG_FS_IRQHandler(void)
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{
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{
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uint32_t sts = OTG->GINTSTS;
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uint32_t sts = OTG->GINTSTS;
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OTG->GINTMSK = (USB_OTG_GINTMSK_USBRST | USB_OTG_GINTSTS_USBSUSP
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OTG->GINTMSK = (USB_OTG_GINTMSK_USBRST | USB_OTG_GINTSTS_USBSUSP
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| USB_OTG_GINTMSK_RXFLVLM | USB_OTG_GINTMSK_IEPINT);
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| USB_OTG_GINTMSK_RXFLVLM | USB_OTG_GINTMSK_IEPINT);
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OTG->GAHBCFG = USB_OTG_GAHBCFG_GINT;
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OTG->GAHBCFG = USB_OTG_GAHBCFG_GINT;
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NVIC_SetPriority(OTG_FS_IRQn, 1);
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armcm_enable_irq(OTG_FS_IRQHandler, OTG_FS_IRQn, 1);
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NVIC_EnableIRQ(OTG_FS_IRQn);
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// Enable USB
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// Enable USB
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OTG->GCCFG |= USB_OTG_GCCFG_PWRDWN;
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OTG->GCCFG |= USB_OTG_GCCFG_PWRDWN;
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