From 40b5de168048e88e6ded1259a18fb2830e8c149e Mon Sep 17 00:00:00 2001
From: Kevin O'Connor <kevin@koconnor.net>
Date: Tue, 15 Jan 2019 10:12:32 -0500
Subject: [PATCH] atsamd: Pass the power management id to enable_pclock()

Pass the power management id instead of the APBCMASK bit to the
enable_pclock() function.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
---
 src/atsamd/adc.c       |  2 +-
 src/atsamd/clock.c     |  5 +++--
 src/atsamd/hard_pwm.c  | 44 +++++++++++++++++++++---------------------
 src/atsamd/i2c.c       |  2 +-
 src/atsamd/internal.h  |  2 +-
 src/atsamd/serial.c    |  2 +-
 src/atsamd/spi.c       |  2 +-
 src/atsamd/timer.c     |  4 ++--
 src/atsamd/usbserial.c |  2 +-
 9 files changed, 33 insertions(+), 32 deletions(-)

diff --git a/src/atsamd/adc.c b/src/atsamd/adc.c
index 38836592..b340c1ff 100644
--- a/src/atsamd/adc.c
+++ b/src/atsamd/adc.c
@@ -28,7 +28,7 @@ adc_init(void)
     have_run_init = 1;
 
     // Enable adc clock
-    enable_pclock(ADC_GCLK_ID, PM_APBCMASK_ADC);
+    enable_pclock(ADC_GCLK_ID, ID_ADC);
 
     // Load calibraiton info
     uint32_t v = *((uint32_t*)ADC_FUSES_BIASCAL_ADDR);
diff --git a/src/atsamd/clock.c b/src/atsamd/clock.c
index af4d1158..1103341a 100644
--- a/src/atsamd/clock.c
+++ b/src/atsamd/clock.c
@@ -36,10 +36,11 @@ route_pclock(uint32_t pclk_id, uint32_t clkgen_id)
 
 // Enable a peripheral clock and power to that peripheral
 void
-enable_pclock(uint32_t pclk_id, uint32_t pmask)
+enable_pclock(uint32_t pclk_id, uint32_t pm_id)
 {
     route_pclock(pclk_id, CLKGEN_MAIN);
-    PM->APBCMASK.reg |= pmask;
+    uint32_t pm_port = pm_id / 32, pm_bit = 1 << (pm_id % 32);
+    (&PM->APBAMASK.reg)[pm_port] |= pm_bit;
 }
 
 void
diff --git a/src/atsamd/hard_pwm.c b/src/atsamd/hard_pwm.c
index 7deecfb9..0f96cb2f 100644
--- a/src/atsamd/hard_pwm.c
+++ b/src/atsamd/hard_pwm.c
@@ -13,31 +13,31 @@
 struct gpio_pwm_info {
     uint32_t gpio;
     Tcc *tcc;
-    uint32_t clock_id, power_id, channel;
+    uint32_t pclk_id, pm_id, channel;
     char ptype;
 };
 
 static const struct gpio_pwm_info pwm_regs[] = {
-    { GPIO('A', 4), TCC0, TCC0_GCLK_ID, PM_APBCMASK_TCC0, 0, 'E' },
-    { GPIO('A', 5), TCC0, TCC0_GCLK_ID, PM_APBCMASK_TCC0, 1, 'E' },
-    { GPIO('A', 6), TCC1, TCC1_GCLK_ID, PM_APBCMASK_TCC1, 0, 'E' },
-    { GPIO('A', 7), TCC1, TCC1_GCLK_ID, PM_APBCMASK_TCC1, 1, 'E' },
-    { GPIO('A', 8), TCC0, TCC0_GCLK_ID, PM_APBCMASK_TCC0, 0, 'E' },
-    { GPIO('A', 9), TCC0, TCC0_GCLK_ID, PM_APBCMASK_TCC0, 1, 'E' },
-    { GPIO('A', 10), TCC1, TCC1_GCLK_ID, PM_APBCMASK_TCC1, 0, 'E' },
-    { GPIO('A', 11), TCC1, TCC1_GCLK_ID, PM_APBCMASK_TCC1, 1, 'E' },
-    { GPIO('A', 12), TCC2, TCC2_GCLK_ID, PM_APBCMASK_TCC2, 0, 'E' },
-    { GPIO('A', 13), TCC2, TCC2_GCLK_ID, PM_APBCMASK_TCC2, 1, 'E' },
-    { GPIO('A', 16), TCC2, TCC2_GCLK_ID, PM_APBCMASK_TCC2, 0, 'E' },
-    { GPIO('A', 17), TCC2, TCC2_GCLK_ID, PM_APBCMASK_TCC2, 1, 'E' },
-    { GPIO('A', 18), TCC0, TCC0_GCLK_ID, PM_APBCMASK_TCC0, 2, 'F' },
-    { GPIO('A', 19), TCC0, TCC0_GCLK_ID, PM_APBCMASK_TCC0, 3, 'F' },
-    { GPIO('A', 24), TCC1, TCC1_GCLK_ID, PM_APBCMASK_TCC1, 2, 'F' },
-    { GPIO('A', 25), TCC1, TCC1_GCLK_ID, PM_APBCMASK_TCC1, 3, 'F' },
-    { GPIO('A', 30), TCC1, TCC1_GCLK_ID, PM_APBCMASK_TCC1, 0, 'E' },
-    { GPIO('A', 31), TCC1, TCC1_GCLK_ID, PM_APBCMASK_TCC1, 1, 'E' },
-    { GPIO('B', 30), TCC0, TCC0_GCLK_ID, PM_APBCMASK_TCC0, 0, 'E' },
-    { GPIO('B', 31), TCC0, TCC0_GCLK_ID, PM_APBCMASK_TCC0, 1, 'E' },
+    { GPIO('A', 4), TCC0, TCC0_GCLK_ID, ID_TCC0, 0, 'E' },
+    { GPIO('A', 5), TCC0, TCC0_GCLK_ID, ID_TCC0, 1, 'E' },
+    { GPIO('A', 6), TCC1, TCC1_GCLK_ID, ID_TCC1, 0, 'E' },
+    { GPIO('A', 7), TCC1, TCC1_GCLK_ID, ID_TCC1, 1, 'E' },
+    { GPIO('A', 8), TCC0, TCC0_GCLK_ID, ID_TCC0, 0, 'E' },
+    { GPIO('A', 9), TCC0, TCC0_GCLK_ID, ID_TCC0, 1, 'E' },
+    { GPIO('A', 10), TCC1, TCC1_GCLK_ID, ID_TCC1, 0, 'E' },
+    { GPIO('A', 11), TCC1, TCC1_GCLK_ID, ID_TCC1, 1, 'E' },
+    { GPIO('A', 12), TCC2, TCC2_GCLK_ID, ID_TCC2, 0, 'E' },
+    { GPIO('A', 13), TCC2, TCC2_GCLK_ID, ID_TCC2, 1, 'E' },
+    { GPIO('A', 16), TCC2, TCC2_GCLK_ID, ID_TCC2, 0, 'E' },
+    { GPIO('A', 17), TCC2, TCC2_GCLK_ID, ID_TCC2, 1, 'E' },
+    { GPIO('A', 18), TCC0, TCC0_GCLK_ID, ID_TCC0, 2, 'F' },
+    { GPIO('A', 19), TCC0, TCC0_GCLK_ID, ID_TCC0, 3, 'F' },
+    { GPIO('A', 24), TCC1, TCC1_GCLK_ID, ID_TCC1, 2, 'F' },
+    { GPIO('A', 25), TCC1, TCC1_GCLK_ID, ID_TCC1, 3, 'F' },
+    { GPIO('A', 30), TCC1, TCC1_GCLK_ID, ID_TCC1, 0, 'E' },
+    { GPIO('A', 31), TCC1, TCC1_GCLK_ID, ID_TCC1, 1, 'E' },
+    { GPIO('B', 30), TCC0, TCC0_GCLK_ID, ID_TCC0, 0, 'E' },
+    { GPIO('B', 31), TCC0, TCC0_GCLK_ID, ID_TCC0, 1, 'E' },
 };
 
 #define MAX_PWM 255
@@ -57,7 +57,7 @@ gpio_pwm_setup(uint8_t pin, uint32_t cycle_time, uint8_t val)
     }
 
     // Enable timer clock
-    enable_pclock(p->clock_id, p->power_id);
+    enable_pclock(p->pclk_id, p->pm_id);
 
     // Map cycle_time to pwm clock divisor
     uint32_t cs;
diff --git a/src/atsamd/i2c.c b/src/atsamd/i2c.c
index 801c0e32..71376322 100644
--- a/src/atsamd/i2c.c
+++ b/src/atsamd/i2c.c
@@ -23,7 +23,7 @@ i2c_init(void)
     have_run_init = 1;
 
     // Setup clock
-    enable_pclock(SERCOM3_GCLK_ID_CORE, PM_APBCMASK_SERCOM3);
+    enable_pclock(SERCOM3_GCLK_ID_CORE, ID_SERCOM3);
 
     // Configure SDA, SCL pins
     gpio_peripheral(GPIO('A', 22), 'C', 0);
diff --git a/src/atsamd/internal.h b/src/atsamd/internal.h
index 7043007f..5606a4ce 100644
--- a/src/atsamd/internal.h
+++ b/src/atsamd/internal.h
@@ -8,7 +8,7 @@
 #define GPIO2PORT(PIN) ((PIN) / 32)
 #define GPIO2BIT(PIN) (1<<((PIN) % 32))
 
-void enable_pclock(uint32_t clock_id, uint32_t pmask);
+void enable_pclock(uint32_t pclk_id, uint32_t pm_id);
 void gpio_peripheral(uint32_t gpio, char ptype, int32_t pull_up);
 
 #endif // internal.h
diff --git a/src/atsamd/serial.c b/src/atsamd/serial.c
index 895ffb27..e8536b50 100644
--- a/src/atsamd/serial.c
+++ b/src/atsamd/serial.c
@@ -14,7 +14,7 @@ void
 serial_init(void)
 {
     // Enable serial clock
-    enable_pclock(SERCOM0_GCLK_ID_CORE, PM_APBCMASK_SERCOM0);
+    enable_pclock(SERCOM0_GCLK_ID_CORE, ID_SERCOM0);
     // Enable pins
     gpio_peripheral(GPIO('A', 10), 'C', 0);
     gpio_peripheral(GPIO('A', 11), 'C', 0);
diff --git a/src/atsamd/spi.c b/src/atsamd/spi.c
index 12c7d680..9c82de1b 100644
--- a/src/atsamd/spi.c
+++ b/src/atsamd/spi.c
@@ -20,7 +20,7 @@ spi_init(uint32_t ctrla, uint32_t baud)
     have_run_init = 1;
 
     // Setup clock
-    enable_pclock(SERCOM4_GCLK_ID_CORE, PM_APBCMASK_SERCOM4);
+    enable_pclock(SERCOM4_GCLK_ID_CORE, ID_SERCOM4);
 
     // Configure MISO, MOSI, SCK pins
     gpio_peripheral(GPIO('A', 12), 'D', 0);
diff --git a/src/atsamd/timer.c b/src/atsamd/timer.c
index 882b4c10..3a133d01 100644
--- a/src/atsamd/timer.c
+++ b/src/atsamd/timer.c
@@ -37,8 +37,8 @@ void
 timer_init(void)
 {
     // Supply power and clock to the timer
-    enable_pclock(TC3_GCLK_ID, PM_APBCMASK_TC3);
-    enable_pclock(TC4_GCLK_ID, PM_APBCMASK_TC4);
+    enable_pclock(TC3_GCLK_ID, ID_TC3);
+    enable_pclock(TC4_GCLK_ID, ID_TC4);
 
     // Configure the timer
     TcCount32 *tc = &TC4->COUNT32;
diff --git a/src/atsamd/usbserial.c b/src/atsamd/usbserial.c
index 0864a4c5..ff9ec519 100644
--- a/src/atsamd/usbserial.c
+++ b/src/atsamd/usbserial.c
@@ -185,7 +185,7 @@ void
 usbserial_init(void)
 {
     // configure usb clock
-    enable_pclock(USB_GCLK_ID, 0);
+    enable_pclock(USB_GCLK_ID, ID_USB);
     // configure USBD+ and USBD- pins
     gpio_peripheral(GPIO('A', 24), 'G', 0);
     gpio_peripheral(GPIO('A', 25), 'G', 0);