diff --git a/src/stm32/Makefile b/src/stm32/Makefile index 10538b27..b018c14c 100644 --- a/src/stm32/Makefile +++ b/src/stm32/Makefile @@ -29,20 +29,20 @@ src-y += stm32/watchdog.c stm32/gpio.c generic/crc16_ccitt.c src-y += generic/armcm_boot.c generic/armcm_irq.c generic/armcm_reset.c src-$(CONFIG_MACH_STM32F0) += ../lib/stm32f0/system_stm32f0xx.c src-$(CONFIG_MACH_STM32F0) += generic/timer_irq.c stm32/stm32f0_timer.c -src-$(CONFIG_MACH_STM32F0) += stm32/stm32f0.c stm32/stm32f0_adc.c -src-$(CONFIG_MACH_STM32F0) += stm32/stm32f0_i2c.c +src-$(CONFIG_MACH_STM32F0) += stm32/stm32f0.c stm32/gpioperiph.c +src-$(CONFIG_MACH_STM32F0) += stm32/stm32f0_adc.c stm32/stm32f0_i2c.c src-$(CONFIG_MACH_STM32F1) += ../lib/stm32f1/system_stm32f1xx.c src-$(CONFIG_MACH_STM32F1) += stm32/stm32f1.c generic/armcm_timer.c src-$(CONFIG_MACH_STM32F1) += stm32/adc.c stm32/i2c.c src-$(CONFIG_MACH_STM32F2) += ../lib/stm32f2/system_stm32f2xx.c src-$(CONFIG_MACH_STM32F2) += stm32/stm32f4.c generic/armcm_timer.c -src-$(CONFIG_MACH_STM32F2) += stm32/adc.c stm32/i2c.c +src-$(CONFIG_MACH_STM32F2) += stm32/gpioperiph.c stm32/adc.c stm32/i2c.c src-$(CONFIG_MACH_STM32F4) += ../lib/stm32f4/system_stm32f4xx.c src-$(CONFIG_MACH_STM32F4) += stm32/stm32f4.c generic/armcm_timer.c -src-$(CONFIG_MACH_STM32F4) += stm32/adc.c stm32/i2c.c +src-$(CONFIG_MACH_STM32F4) += stm32/gpioperiph.c stm32/adc.c stm32/i2c.c src-$(CONFIG_MACH_STM32H7) += ../lib/stm32h7/system_stm32h7xx.c src-$(CONFIG_MACH_STM32H7) += stm32/stm32h7.c generic/armcm_timer.c -src-$(CONFIG_MACH_STM32H7) += stm32/stm32h7_adc.c +src-$(CONFIG_MACH_STM32H7) += stm32/gpioperiph.c stm32/stm32h7_adc.c spi-src-y := stm32/spi.c spi-src-$(CONFIG_MACH_STM32H7) := stm32/stm32h7_spi.c src-$(CONFIG_HAVE_GPIO_SPI) += $(spi-src-y) diff --git a/src/stm32/gpioperiph.c b/src/stm32/gpioperiph.c new file mode 100644 index 00000000..e003e9f0 --- /dev/null +++ b/src/stm32/gpioperiph.c @@ -0,0 +1,37 @@ +// Code to setup gpio on stm32 chip (except for stm32f1) +// +// Copyright (C) 2019-2021 Kevin O'Connor +// +// This file may be distributed under the terms of the GNU GPLv3 license. + +#include "internal.h" // gpio_peripheral + +// Set the mode and extended function of a pin +void +gpio_peripheral(uint32_t gpio, uint32_t mode, int pullup) +{ + GPIO_TypeDef *regs = digital_regs[GPIO2PORT(gpio)]; + + // Enable GPIO clock + gpio_clock_enable(regs); + + // Configure GPIO + uint32_t mode_bits = mode & 0xf, func = (mode >> 4) & 0xf, od = mode >> 8; + uint32_t pup = pullup ? (pullup > 0 ? 1 : 2) : 0; + uint32_t pos = gpio % 16, af_reg = pos / 8; + uint32_t af_shift = (pos % 8) * 4, af_msk = 0x0f << af_shift; + uint32_t m_shift = pos * 2, m_msk = 0x03 << m_shift; + + regs->AFR[af_reg] = (regs->AFR[af_reg] & ~af_msk) | (func << af_shift); + regs->MODER = (regs->MODER & ~m_msk) | (mode_bits << m_shift); + regs->PUPDR = (regs->PUPDR & ~m_msk) | (pup << m_shift); + regs->OTYPER = (regs->OTYPER & ~(1 << pos)) | (od << pos); + + // Setup OSPEEDR: + // stm32f0 is ~10Mhz at 50pF + // stm32f2 is ~25Mhz at 40pF + // stm32f4 is ~50Mhz at 40pF + // stm32h7 is ~85Mhz at 50pF + uint32_t ospeed = CONFIG_MACH_STM32F0 ? 0x01 : 0x02; + regs->OSPEEDR = (regs->OSPEEDR & ~m_msk) | (ospeed << m_shift); +} diff --git a/src/stm32/stm32f0.c b/src/stm32/stm32f0.c index 54338b14..0464d6d3 100644 --- a/src/stm32/stm32f0.c +++ b/src/stm32/stm32f0.c @@ -1,4 +1,4 @@ -// Code to setup clocks and gpio on stm32f0 +// Code to setup clocks on stm32f0 // // Copyright (C) 2019 Kevin O'Connor // @@ -64,31 +64,6 @@ gpio_clock_enable(GPIO_TypeDef *regs) RCC->AHBENR; } -#define STM_OSPEED 0x1 // ~10Mhz at 50pF - -// Set the mode and extended function of a pin -void -gpio_peripheral(uint32_t gpio, uint32_t mode, int pullup) -{ - GPIO_TypeDef *regs = digital_regs[GPIO2PORT(gpio)]; - - // Enable GPIO clock - gpio_clock_enable(regs); - - // Configure GPIO - uint32_t mode_bits = mode & 0xf, func = (mode >> 4) & 0xf, od = mode >> 8; - uint32_t pup = pullup ? (pullup > 0 ? 1 : 2) : 0; - uint32_t pos = gpio % 16, af_reg = pos / 8; - uint32_t af_shift = (pos % 8) * 4, af_msk = 0x0f << af_shift; - uint32_t m_shift = pos * 2, m_msk = 0x03 << m_shift; - - regs->AFR[af_reg] = (regs->AFR[af_reg] & ~af_msk) | (func << af_shift); - regs->MODER = (regs->MODER & ~m_msk) | (mode_bits << m_shift); - regs->PUPDR = (regs->PUPDR & ~m_msk) | (pup << m_shift); - regs->OTYPER = (regs->OTYPER & ~(1 << pos)) | (od << pos); - regs->OSPEEDR = (regs->OSPEEDR & ~m_msk) | (STM_OSPEED << m_shift); -} - #define USB_BOOT_FLAG_ADDR (CONFIG_RAM_START + CONFIG_RAM_SIZE - 1024) #define USB_BOOT_FLAG 0x55534220424f4f54 // "USB BOOT" diff --git a/src/stm32/stm32f4.c b/src/stm32/stm32f4.c index 3e5fc2d2..267a5c74 100644 --- a/src/stm32/stm32f4.c +++ b/src/stm32/stm32f4.c @@ -1,4 +1,4 @@ -// Code to setup clocks and gpio on stm32f2/stm32f4 +// Code to setup clocks on stm32f2/stm32f4 // // Copyright (C) 2019 Kevin O'Connor // @@ -75,31 +75,6 @@ gpio_clock_enable(GPIO_TypeDef *regs) RCC->AHB1ENR; } -#define STM_OSPEED 0x2 // ~50Mhz at 40pF on STM32F4 (~25Mhz at 40pF on STM32F2) - -// Set the mode and extended function of a pin -void -gpio_peripheral(uint32_t gpio, uint32_t mode, int pullup) -{ - GPIO_TypeDef *regs = digital_regs[GPIO2PORT(gpio)]; - - // Enable GPIO clock - gpio_clock_enable(regs); - - // Configure GPIO - uint32_t mode_bits = mode & 0xf, func = (mode >> 4) & 0xf, od = mode >> 8; - uint32_t pup = pullup ? (pullup > 0 ? 1 : 2) : 0; - uint32_t pos = gpio % 16, af_reg = pos / 8; - uint32_t af_shift = (pos % 8) * 4, af_msk = 0x0f << af_shift; - uint32_t m_shift = pos * 2, m_msk = 0x03 << m_shift; - - regs->AFR[af_reg] = (regs->AFR[af_reg] & ~af_msk) | (func << af_shift); - regs->MODER = (regs->MODER & ~m_msk) | (mode_bits << m_shift); - regs->PUPDR = (regs->PUPDR & ~m_msk) | (pup << m_shift); - regs->OTYPER = (regs->OTYPER & ~(1 << pos)) | (od << pos); - regs->OSPEEDR = (regs->OSPEEDR & ~m_msk) | (STM_OSPEED << m_shift); -} - #define USB_BOOT_FLAG_ADDR (CONFIG_RAM_START + CONFIG_RAM_SIZE - 4096) #define USB_BOOT_FLAG 0x55534220424f4f54 // "USB BOOT" diff --git a/src/stm32/stm32h7.c b/src/stm32/stm32h7.c index f5ef19b2..bc64b803 100644 --- a/src/stm32/stm32h7.c +++ b/src/stm32/stm32h7.c @@ -1,4 +1,4 @@ -// Code to setup clocks and gpio on stm32h7 +// Code to setup clocks on stm32h7 // // Copyright (C) 2020 Konstantin Vogel // @@ -102,31 +102,6 @@ gpio_clock_enable(GPIO_TypeDef *regs) enable_pclock((uint32_t)regs); } -#define STM_OSPEED 0x2 // ~85Mhz at 50pF - -// Set the mode and extended function of a pin -void -gpio_peripheral(uint32_t gpio, uint32_t mode, int pullup) -{ - GPIO_TypeDef *regs = digital_regs[GPIO2PORT(gpio)]; - - // Enable GPIO clock - gpio_clock_enable(regs); - - // Configure GPIO - uint32_t mode_bits = mode & 0xf, func = (mode >> 4) & 0xf, od = mode >> 8; - uint32_t pup = pullup ? (pullup > 0 ? 1 : 2) : 0; - uint32_t pos = gpio % 16, af_reg = pos / 8; - uint32_t af_shift = (pos % 8) * 4, af_msk = 0x0f << af_shift; - uint32_t m_shift = pos * 2, m_msk = 0x03 << m_shift; - - regs->AFR[af_reg] = (regs->AFR[af_reg] & ~af_msk) | (func << af_shift); - regs->MODER = (regs->MODER & ~m_msk) | (mode_bits << m_shift); - regs->PUPDR = (regs->PUPDR & ~m_msk) | (pup << m_shift); - regs->OTYPER = (regs->OTYPER & ~(1 << pos)) | (od << pos); - regs->OSPEEDR = (regs->OSPEEDR & ~m_msk) | (STM_OSPEED << m_shift); -} - #define USB_BOOT_FLAG_ADDR (CONFIG_RAM_START + CONFIG_RAM_SIZE - 4096) #define USB_BOOT_FLAG 0x55534220424f4f54 // "USB BOOT"