From 277a8185e1550b55f634c40923db155771736063 Mon Sep 17 00:00:00 2001
From: Kevin O'Connor <kevin@koconnor.net>
Date: Fri, 4 Jan 2019 11:07:22 -0500
Subject: [PATCH] lpc176x: Pass gpio id to gpio_peripheral()

Pass the gpio id instead of the bank/pin to gpio_peripheral().  This
is in keeping with other ARM ports.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
---
 src/lpc176x/adc.c       |  2 +-
 src/lpc176x/gpio.c      | 18 +++++++++---------
 src/lpc176x/i2c.c       |  4 ++--
 src/lpc176x/internal.h  |  2 +-
 src/lpc176x/serial.c    |  4 ++--
 src/lpc176x/spi.c       |  6 +++---
 src/lpc176x/usbserial.c |  6 +++---
 7 files changed, 21 insertions(+), 21 deletions(-)

diff --git a/src/lpc176x/adc.c b/src/lpc176x/adc.c
index c9d2ccae..4484b59d 100644
--- a/src/lpc176x/adc.c
+++ b/src/lpc176x/adc.c
@@ -44,7 +44,7 @@ gpio_adc_setup(uint8_t pin)
         LPC_ADC->ADCR = adcr;
     }
 
-    gpio_peripheral(GPIO2PORT(pin), pin % 32, adc_pin_funcs[chan], 0);
+    gpio_peripheral(pin, adc_pin_funcs[chan], 0);
 
     return (struct gpio_adc){ .cmd = adcr | (1 << chan) | (1 << 24) };
 }
diff --git a/src/lpc176x/gpio.c b/src/lpc176x/gpio.c
index 66b657d8..0b5fb1a9 100644
--- a/src/lpc176x/gpio.c
+++ b/src/lpc176x/gpio.c
@@ -21,16 +21,11 @@ static LPC_GPIO_TypeDef * const digital_regs[] = {
     LPC_GPIO0, LPC_GPIO1, LPC_GPIO2, LPC_GPIO3, LPC_GPIO4
 };
 
-
-/****************************************************************
- * General Purpose Input Output (GPIO) pins
- ****************************************************************/
-
 // Set the mode and extended function of a pin
 void
-gpio_peripheral(int bank, int pin, int func, int pullup)
+gpio_peripheral(uint32_t gpio, int func, int pullup)
 {
-    uint32_t bank_pos = bank * 2, pin_pos = pin * 2;
+    uint32_t bank_pos = GPIO2PORT(gpio) * 2, pin_pos = (gpio % 32) * 2;
     if (pin_pos >= 32) {
         pin_pos -= 32;
         bank_pos++;
@@ -56,6 +51,11 @@ regs_to_pin(LPC_GPIO_TypeDef *regs, uint32_t bit)
     return 0;
 }
 
+
+/****************************************************************
+ * General Purpose Input Output (GPIO) pins
+ ****************************************************************/
+
 struct gpio_out
 gpio_out_setup(uint8_t pin, uint8_t val)
 {
@@ -80,7 +80,7 @@ gpio_out_reset(struct gpio_out g, uint8_t val)
     else
         regs->FIOCLR = g.bit;
     regs->FIODIR |= g.bit;
-    gpio_peripheral(GPIO2PORT(pin), pin % 32, 0, 0);
+    gpio_peripheral(pin, 0, 0);
     irq_restore(flag);
 }
 
@@ -129,7 +129,7 @@ gpio_in_reset(struct gpio_in g, int8_t pull_up)
     LPC_GPIO_TypeDef *regs = g.regs;
     int pin = regs_to_pin(regs, g.bit);
     irqstatus_t flag = irq_save();
-    gpio_peripheral(GPIO2PORT(pin), pin % 32, 0, pull_up);
+    gpio_peripheral(pin, 0, pull_up);
     regs->FIODIR &= ~g.bit;
     irq_restore(flag);
 }
diff --git a/src/lpc176x/i2c.c b/src/lpc176x/i2c.c
index cc45ad14..bc367ba7 100644
--- a/src/lpc176x/i2c.c
+++ b/src/lpc176x/i2c.c
@@ -25,8 +25,8 @@ i2c_init(void)
     have_run_init = 1;
 
     // Init i2c bus 1 pins
-    gpio_peripheral(0, 0, 3, 0);
-    gpio_peripheral(0, 1, 3, 0);
+    gpio_peripheral(GPIO(0, 0), 3, 0);
+    gpio_peripheral(GPIO(0, 1), 3, 0);
 
     // Set 100Khz frequency
     enable_pclock(PCLK_I2C1);
diff --git a/src/lpc176x/internal.h b/src/lpc176x/internal.h
index 3e458c18..bd3e9c01 100644
--- a/src/lpc176x/internal.h
+++ b/src/lpc176x/internal.h
@@ -14,6 +14,6 @@
 #define PCLK_USB 31
 int is_enabled_pclock(uint32_t pclk);
 void enable_pclock(uint32_t pclk);
-void gpio_peripheral(int bank, int pin, int func, int pullup);
+void gpio_peripheral(uint32_t gpio, int func, int pullup);
 
 #endif // internal.h
diff --git a/src/lpc176x/serial.c b/src/lpc176x/serial.c
index 29a535a3..f53b1a81 100644
--- a/src/lpc176x/serial.c
+++ b/src/lpc176x/serial.c
@@ -27,8 +27,8 @@ serial_init(void)
     LPC_UART0->FCR = 0x01;
 
     // Setup pins
-    gpio_peripheral(0, 2, 1, 0);
-    gpio_peripheral(0, 3, 1, 0);
+    gpio_peripheral(GPIO(0, 2), 1, 0);
+    gpio_peripheral(GPIO(0, 3), 1, 0);
 
     // Enable receive irq
     NVIC_SetPriority(UART0_IRQn, 0);
diff --git a/src/lpc176x/spi.c b/src/lpc176x/spi.c
index 726ffce3..e959877c 100644
--- a/src/lpc176x/spi.c
+++ b/src/lpc176x/spi.c
@@ -19,9 +19,9 @@ spi_init(void)
     have_run_init = 1;
 
     // Configure SCK0, MISO0, MOSI0 pins
-    gpio_peripheral(0, 15, 2, 0);
-    gpio_peripheral(0, 17, 2, 0);
-    gpio_peripheral(0, 18, 2, 0);
+    gpio_peripheral(GPIO(0, 15), 2, 0);
+    gpio_peripheral(GPIO(0, 17), 2, 0);
+    gpio_peripheral(GPIO(0, 18), 2, 0);
 
     // Setup clock
     enable_pclock(PCLK_SSP0);
diff --git a/src/lpc176x/usbserial.c b/src/lpc176x/usbserial.c
index 041c2da4..677aa013 100644
--- a/src/lpc176x/usbserial.c
+++ b/src/lpc176x/usbserial.c
@@ -257,9 +257,9 @@ usbserial_init(void)
     while (LPC_USB->USBClkSt != 0x12)
         ;
     // configure USBD+, USBD-, and USB Connect pins
-    gpio_peripheral(0, 29, 1, 0);
-    gpio_peripheral(0, 30, 1, 0);
-    gpio_peripheral(2, 9, 1, 0);
+    gpio_peripheral(GPIO(0, 29), 1, 0);
+    gpio_peripheral(GPIO(0, 30), 1, 0);
+    gpio_peripheral(GPIO(2, 9), 1, 0);
     // setup endpoints
     realize_endpoint(EP0OUT, USB_CDC_EP0_SIZE);
     realize_endpoint(EP0IN, USB_CDC_EP0_SIZE);