diff --git a/src/stm32/serial.c b/src/stm32/serial.c
index 5806eaab..19aa048e 100644
--- a/src/stm32/serial.c
+++ b/src/stm32/serial.c
@@ -57,8 +57,11 @@ void
 USARTx_IRQHandler(void)
 {
     uint32_t sr = USARTx->SR;
-    if (sr & (USART_SR_RXNE | USART_SR_ORE))
+    if (sr & (USART_SR_RXNE | USART_SR_ORE)) {
+        // The ORE flag is automatically cleared by reading SR, followed
+        // by reading DR.
         serial_rx_byte(USARTx->DR);
+    }
     if (sr & USART_SR_TXE && USARTx->CR1 & USART_CR1_TXEIE) {
         uint8_t data;
         int ret = serial_get_tx_byte(&data);
diff --git a/src/stm32/stm32f0_serial.c b/src/stm32/stm32f0_serial.c
index c214ed01..da76be42 100644
--- a/src/stm32/stm32f0_serial.c
+++ b/src/stm32/stm32f0_serial.c
@@ -66,7 +66,7 @@ void
 USARTx_IRQHandler(void)
 {
     uint32_t sr = USARTx->ISR;
-    if (sr & (USART_ISR_RXNE | USART_ISR_ORE))
+    if (sr & USART_ISR_RXNE)
         serial_rx_byte(USARTx->RDR);
     if (sr & USART_ISR_TXE && USARTx->CR1 & USART_CR1_TXEIE) {
         uint8_t data;
@@ -93,6 +93,7 @@ serial_init(void)
     uint32_t div = DIV_ROUND_CLOSEST(pclk, CONFIG_SERIAL_BAUD);
     USARTx->BRR = (((div / 16) << USART_BRR_DIV_MANTISSA_Pos)
                    | ((div % 16) << USART_BRR_DIV_FRACTION_Pos));
+    USARTx->CR3 = USART_CR3_OVRDIS; // disable the ORE ISR
     USARTx->CR1 = CR1_FLAGS;
     armcm_enable_irq(USARTx_IRQHandler, USARTx_IRQn, 0);
 
diff --git a/src/stm32/stm32h7_serial.c b/src/stm32/stm32h7_serial.c
index 1cb93e9b..b5070290 100644
--- a/src/stm32/stm32h7_serial.c
+++ b/src/stm32/stm32h7_serial.c
@@ -68,7 +68,7 @@ void
 USARTx_IRQHandler(void)
 {
     uint32_t isr = USARTx->ISR;
-    if (isr & (USART_ISR_RXNE_RXFNE | USART_ISR_ORE))
+    if (isr & USART_ISR_RXNE_RXFNE)
         serial_rx_byte(USARTx->RDR);
     //USART_ISR_TXE_TXFNF only works with Fifo mode disabled
     if (isr & USART_ISR_TXE_TXFNF && USARTx->CR1 & USART_CR1_TXEIE) {
@@ -96,6 +96,7 @@ serial_init(void)
     uint32_t div = DIV_ROUND_CLOSEST(pclk, CONFIG_SERIAL_BAUD);
     USARTx->BRR = (((div / 16) << USART_BRR_DIV_MANTISSA_Pos)
                  | ((div % 16) << USART_BRR_DIV_FRACTION_Pos));
+    USARTx->CR3 = USART_CR3_OVRDIS; // disable the ORE ISR
     USARTx->CR1 = CR1_FLAGS;
     armcm_enable_irq(USARTx_IRQHandler, USARTx_IRQn, 0);