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stm32: add PB12/PB13 FDCAN2 support STM32G0B1 

Signed-off-by: Alan.Ma from BigTreeTech tech@biqu3d.com
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
This commit is contained in:
bigtreetech 2023-01-12 15:47:08 +08:00 committed by Kevin O'Connor
parent 13fd2833ce
commit 1979c9d090
2 changed files with 8 additions and 3 deletions
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4
src/stm32/Kconfig
View File

@ -410,7 +410,7 @@ choice
select CANSERIAL
config STM32_MMENU_CANBUS_PB12_PB13
bool "CAN bus (on PB12/PB13)" if LOW_LEVEL_OPTIONS
depends on HAVE_STM32_CANBUS && MACH_STM32F4
depends on (HAVE_STM32_CANBUS && MACH_STM32F4) || HAVE_STM32_FDCANBUS
select CANSERIAL
config STM32_MMENU_CANBUS_PD0_PD1
bool "CAN bus (on PD0/PD1)" if LOW_LEVEL_OPTIONS
@ -445,7 +445,7 @@ choice
depends on HAVE_STM32_CANBUS && MACH_STM32F4
config STM32_CMENU_CANBUS_PB12_PB13
bool "CAN bus (on PB12/PB13)"
depends on HAVE_STM32_CANBUS && MACH_STM32F4
depends on (HAVE_STM32_CANBUS && MACH_STM32F4) || HAVE_STM32_FDCANBUS
config STM32_CMENU_CANBUS_PD0_PD1
bool "CAN bus (on PD0/PD1)"
depends on HAVE_STM32_CANBUS || HAVE_STM32_FDCANBUS

7
src/stm32/fdcan.c
View File

@ -46,9 +46,14 @@
DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PC2,PC3");
#define GPIO_Rx GPIO('C', 2)
#define GPIO_Tx GPIO('C', 3)
#elif CONFIG_STM32_CANBUS_PB12_PB13
DECL_CONSTANT_STR("RESERVE_PINS_CAN", "PB12,PB13");
#define GPIO_Rx GPIO('B', 12)
#define GPIO_Tx GPIO('B', 13)
#endif
#if !(CONFIG_STM32_CANBUS_PB0_PB1 || CONFIG_STM32_CANBUS_PC2_PC3)
#if !(CONFIG_STM32_CANBUS_PB0_PB1 || CONFIG_STM32_CANBUS_PC2_PC3 \
|| CONFIG_STM32_CANBUS_PB12_PB13)
#define SOC_CAN FDCAN1
#define MSG_RAM (((struct fdcan_ram_layout*)SRAMCAN_BASE)->fdcan1)
#else