stm32f4: Add support for GPIO

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>

src/stm32f4/Kconfig

@@ -5,6 +5,7 @@ if MACH_STM32F4
 config STM32F4_SELECT
     bool
     default y
+    select HAVE_GPIO
 
 config BOARD_DIRECTORY
     string

src/stm32f4/gpio.c

@@ -4,7 +4,16 @@
 //
 // This file may be distributed under the terms of the GNU GPLv3 license.
 
+#include <string.h> // ffs
+#include "board/irq.h" // irq_save
+#include "command.h" // DECL_ENUMERATION_RANGE
+#include "gpio.h" // gpio_out_setup
 #include "internal.h" // gpio_peripheral
+#include "sched.h" // sched_shutdown
+
+DECL_ENUMERATION_RANGE("pin", "PA0", GPIO('A', 0), 32);
+DECL_ENUMERATION_RANGE("pin", "PB0", GPIO('B', 0), 32);
+DECL_ENUMERATION_RANGE("pin", "PC0", GPIO('C', 0), 32);
 
 static GPIO_TypeDef * const digital_regs[] = {
     GPIOA, GPIOB, GPIOC
@@ -25,3 +34,102 @@ gpio_peripheral(uint32_t gpio, uint32_t mode, uint32_t func, int pullup)
     regs->PUPDR = (regs->PUPDR & ~m_msk) | (pup << m_shift);
     regs->OSPEEDR = (regs->OSPEEDR & ~m_msk) | (0x02 << m_shift);
 }
+
+// Convert a register and bit location back to an integer pin identifier
+static int
+regs_to_pin(GPIO_TypeDef *regs, uint32_t bit)
+{
+    int i;
+    for (i=0; i<ARRAY_SIZE(digital_regs); i++)
+        if (digital_regs[i] == regs)
+            return GPIO('A' + i, ffs(bit)-1);
+    return 0;
+}
+
+
+/****************************************************************
+ * General Purpose Input Output (GPIO) pins
+ ****************************************************************/
+
+struct gpio_out
+gpio_out_setup(uint32_t pin, uint32_t val)
+{
+    if (GPIO2PORT(pin) >= ARRAY_SIZE(digital_regs))
+        goto fail;
+    GPIO_TypeDef *regs = digital_regs[GPIO2PORT(pin)];
+    struct gpio_out g = { .regs=regs, .bit=GPIO2BIT(pin) };
+    gpio_out_reset(g, val);
+    return g;
+fail:
+    shutdown("Not an output pin");
+}
+
+void
+gpio_out_reset(struct gpio_out g, uint32_t val)
+{
+    GPIO_TypeDef *regs = g.regs;
+    int pin = regs_to_pin(regs, g.bit);
+    irqstatus_t flag = irq_save();
+    if (val)
+        regs->BSRR = g.bit;
+    else
+        regs->BSRR = g.bit << 16;
+    gpio_peripheral(pin, GPIO_OUTPUT, 0, 0);
+    irq_restore(flag);
+}
+
+void
+gpio_out_toggle_noirq(struct gpio_out g)
+{
+    GPIO_TypeDef *regs = g.regs;
+    regs->ODR ^= g.bit;
+}
+
+void
+gpio_out_toggle(struct gpio_out g)
+{
+    irqstatus_t flag = irq_save();
+    gpio_out_toggle_noirq(g);
+    irq_restore(flag);
+}
+
+void
+gpio_out_write(struct gpio_out g, uint32_t val)
+{
+    GPIO_TypeDef *regs = g.regs;
+    if (val)
+        regs->BSRR = g.bit;
+    else
+        regs->BSRR = g.bit << 16;
+}
+
+
+struct gpio_in
+gpio_in_setup(uint32_t pin, int32_t pull_up)
+{
+    if (GPIO2PORT(pin) >= ARRAY_SIZE(digital_regs))
+        goto fail;
+    GPIO_TypeDef *regs = digital_regs[GPIO2PORT(pin)];
+    struct gpio_in g = { .regs=regs, .bit=GPIO2BIT(pin) };
+    gpio_in_reset(g, pull_up);
+    return g;
+fail:
+    shutdown("Not a valid input pin");
+}
+
+void
+gpio_in_reset(struct gpio_in g, int32_t pull_up)
+{
+    GPIO_TypeDef *regs = g.regs;
+    int pin = regs_to_pin(regs, g.bit);
+    irqstatus_t flag = irq_save();
+    gpio_peripheral(pin, GPIO_INPUT, 0, pull_up);
+    irq_restore(flag);
+}
+
+uint8_t
+gpio_in_read(struct gpio_in g)
+{
+    GPIO_TypeDef *regs = g.regs;
+    return !!(regs->IDR & g.bit);
+}

src/stm32f4/gpio.h

@@ -0,0 +1,24 @@
+#ifndef __STM32F4_GPIO_H
+#define __STM32F4_GPIO_H
+
+#include <stdint.h> // uint32_t
+
+struct gpio_out {
+    void *regs;
+    uint32_t bit;
+};
+struct gpio_out gpio_out_setup(uint32_t pin, uint32_t val);
+void gpio_out_reset(struct gpio_out g, uint32_t val);
+void gpio_out_toggle_noirq(struct gpio_out g);
+void gpio_out_toggle(struct gpio_out g);
+void gpio_out_write(struct gpio_out g, uint32_t val);
+
+struct gpio_in {
+    void *regs;
+    uint32_t bit;
+};
+struct gpio_in gpio_in_setup(uint32_t pin, int32_t pull_up);
+void gpio_in_reset(struct gpio_in g, int32_t pull_up);
+uint8_t gpio_in_read(struct gpio_in g);
+
+#endif // gpio.h