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stm32: Fix gpio enumerations (each bank has 16 pins, not 32) 

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
This commit is contained in:
Kevin O'Connor 2019-08-31 18:35:01 -04:00
parent c380d4639b
commit 017a4d8321
1 changed files with 9 additions and 9 deletions
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18
src/stm32/gpio.c
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@ -11,18 +11,18 @@
#include "internal.h" // gpio_peripheral #include "internal.h" // gpio_peripheral
#include "sched.h" // sched_shutdown #include "sched.h" // sched_shutdown
DECL_ENUMERATION_RANGE("pin", "PA0", GPIO('A', 0), 32); DECL_ENUMERATION_RANGE("pin", "PA0", GPIO('A', 0), 16);
DECL_ENUMERATION_RANGE("pin", "PB0", GPIO('B', 0), 32); DECL_ENUMERATION_RANGE("pin", "PB0", GPIO('B', 0), 16);
DECL_ENUMERATION_RANGE("pin", "PC0", GPIO('C', 0), 32); DECL_ENUMERATION_RANGE("pin", "PC0", GPIO('C', 0), 16);
DECL_ENUMERATION_RANGE("pin", "PD0", GPIO('D', 0), 32); DECL_ENUMERATION_RANGE("pin", "PD0", GPIO('D', 0), 16);
DECL_ENUMERATION_RANGE("pin", "PE0", GPIO('E', 0), 32); DECL_ENUMERATION_RANGE("pin", "PE0", GPIO('E', 0), 16);
#ifdef GPIOH #ifdef GPIOH
DECL_ENUMERATION_RANGE("pin", "PF0", GPIO('F', 0), 32); DECL_ENUMERATION_RANGE("pin", "PF0", GPIO('F', 0), 16);
DECL_ENUMERATION_RANGE("pin", "PG0", GPIO('G', 0), 32); DECL_ENUMERATION_RANGE("pin", "PG0", GPIO('G', 0), 16);
DECL_ENUMERATION_RANGE("pin", "PH0", GPIO('H', 0), 32); DECL_ENUMERATION_RANGE("pin", "PH0", GPIO('H', 0), 16);
#endif #endif
#ifdef GPIOI #ifdef GPIOI
DECL_ENUMERATION_RANGE("pin", "PI0", GPIO('I', 0), 32); DECL_ENUMERATION_RANGE("pin", "PI0", GPIO('I', 0), 16);
#endif #endif
GPIO_TypeDef * const digital_regs[] = { GPIO_TypeDef * const digital_regs[] = {