2019-07-24 06:51:31 +03:00
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// STM32F4 serial
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//
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// Copyright (C) 2019 Kevin O'Connor <kevin@koconnor.net>
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//
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// This file may be distributed under the terms of the GNU GPLv3 license.
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#include "autoconf.h" // CONFIG_SERIAL_BAUD
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#include "board/serial_irq.h" // serial_rx_byte
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#include "command.h" // DECL_CONSTANT_STR
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#include "internal.h" // enable_pclock
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#include "sched.h" // DECL_INIT
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DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA3,PA2");
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#define CR1_FLAGS (USART_CR1_UE | USART_CR1_RE | USART_CR1_TE \
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| USART_CR1_RXNEIE)
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void
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serial_init(void)
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{
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enable_pclock(USART2_BASE);
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uint32_t pclk = get_pclock_frequency(USART2_BASE);
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2019-07-26 15:01:31 +03:00
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uint32_t div = DIV_ROUND_CLOSEST(pclk, CONFIG_SERIAL_BAUD);
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USART2->BRR = (((div / 16) << USART_BRR_DIV_Mantissa_Pos)
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| ((div % 16) << USART_BRR_DIV_Fraction_Pos));
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2019-07-24 06:51:31 +03:00
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USART2->CR1 = CR1_FLAGS;
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NVIC_SetPriority(USART2_IRQn, 0);
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NVIC_EnableIRQ(USART2_IRQn);
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gpio_peripheral(GPIO('A', 2), GPIO_FUNCTION, 7, 0);
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gpio_peripheral(GPIO('A', 3), GPIO_FUNCTION, 7, 1);
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}
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DECL_INIT(serial_init);
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void __visible
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USART2_IRQHandler(void)
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{
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uint32_t sr = USART2->SR;
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if (sr & (USART_SR_RXNE | USART_SR_ORE))
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serial_rx_byte(USART2->DR);
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if (sr & USART_SR_TXE && USART2->CR1 & USART_CR1_TXEIE) {
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uint8_t data;
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int ret = serial_get_tx_byte(&data);
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if (ret)
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USART2->CR1 = CR1_FLAGS;
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else
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USART2->DR = data;
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}
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}
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void
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serial_enable_tx_irq(void)
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{
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USART2->CR1 = CR1_FLAGS | USART_CR1_TXEIE;
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}
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