677 lines
22 KiB
C
677 lines
22 KiB
C
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/**
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******************************************************************************
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* @file stm32f0xx_hal_cec.c
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* @author MCD Application Team
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* @brief CEC HAL module driver.
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* This file provides firmware functions to manage the following
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* functionalities of the High Definition Multimedia Interface
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* Consumer Electronics Control Peripheral (CEC).
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* + Initialization and de-initialization functions
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* + IO operation functions
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* + Peripheral Control functions
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*
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*
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@verbatim
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===============================================================================
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##### How to use this driver #####
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===============================================================================
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[..]
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The CEC HAL driver can be used as follow:
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(#) Declare a CEC_HandleTypeDef handle structure.
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(#) Initialize the CEC low level resources by implementing the HAL_CEC_MspInit ()API:
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(##) Enable the CEC interface clock.
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(##) CEC pins configuration:
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(+) Enable the clock for the CEC GPIOs.
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(+) Configure these CEC pins as alternate function pull-up.
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(##) NVIC configuration if you need to use interrupt process (HAL_CEC_Transmit_IT()
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and HAL_CEC_Receive_IT() APIs):
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(+) Configure the CEC interrupt priority.
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(+) Enable the NVIC CEC IRQ handle.
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(@) The specific CEC interrupts (Transmission complete interrupt,
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RXNE interrupt and Error Interrupts) will be managed using the macros
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__HAL_CEC_ENABLE_IT() and __HAL_CEC_DISABLE_IT() inside the transmit
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and receive process.
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(#) Program the Signal Free Time (SFT) and SFT option, Tolerance, reception stop in
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in case of Bit Rising Error, Error-Bit generation conditions, device logical
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address and Listen mode in the hcec Init structure.
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(#) Initialize the CEC registers by calling the HAL_CEC_Init() API.
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(@) This API (HAL_CEC_Init()) configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
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by calling the customed HAL_CEC_MspInit() API.
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@endverbatim
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f0xx_hal.h"
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#ifdef HAL_CEC_MODULE_ENABLED
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#if defined(STM32F042x6) || defined(STM32F048xx) ||\
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defined(STM32F051x8) || defined(STM32F058xx) ||\
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defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) ||\
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defined(STM32F091xC) || defined (STM32F098xx)
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/** @addtogroup STM32F0xx_HAL_Driver
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* @{
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*/
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/** @defgroup CEC CEC
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* @brief HAL CEC module driver
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* @{
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*/
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/** @defgroup CEC_Private_Constants CEC Private Constants
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* @{
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*/
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/**
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* @}
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*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/** @defgroup CEC_Private_Functions CEC Private Functions
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* @{
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*/
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/**
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* @}
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*/
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/* Exported functions ---------------------------------------------------------*/
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/** @defgroup CEC_Exported_Functions CEC Exported Functions
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* @{
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*/
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/** @defgroup CEC_Exported_Functions_Group1 Initialization and de-initialization functions
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* @brief Initialization and Configuration functions
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*
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@verbatim
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===============================================================================
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##### Initialization and Configuration functions #####
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===============================================================================
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[..]
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This subsection provides a set of functions allowing to initialize the CEC
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(+) The following parameters need to be configured:
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(++) SignalFreeTime
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(++) Tolerance
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(++) BRERxStop (RX stopped or not upon Bit Rising Error)
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(++) BREErrorBitGen (Error-Bit generation in case of Bit Rising Error)
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(++) LBPEErrorBitGen (Error-Bit generation in case of Long Bit Period Error)
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(++) BroadcastMsgNoErrorBitGen (Error-bit generation in case of broadcast message error)
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(++) SignalFreeTimeOption (SFT Timer start definition)
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(++) OwnAddress (CEC device address)
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(++) ListenMode
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@endverbatim
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* @{
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*/
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/**
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* @brief Initializes the CEC mode according to the specified
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* parameters in the CEC_InitTypeDef and creates the associated handle .
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* @param hcec CEC handle
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec)
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{
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/* Check the CEC handle allocation */
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if((hcec == NULL) ||(hcec->Init.RxBuffer == NULL))
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{
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return HAL_ERROR;
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}
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/* Check the parameters */
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assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance));
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assert_param(IS_CEC_SIGNALFREETIME(hcec->Init.SignalFreeTime));
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assert_param(IS_CEC_TOLERANCE(hcec->Init.Tolerance));
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assert_param(IS_CEC_BRERXSTOP(hcec->Init.BRERxStop));
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assert_param(IS_CEC_BREERRORBITGEN(hcec->Init.BREErrorBitGen));
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assert_param(IS_CEC_LBPEERRORBITGEN(hcec->Init.LBPEErrorBitGen));
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assert_param(IS_CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION(hcec->Init.BroadcastMsgNoErrorBitGen));
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assert_param(IS_CEC_SFTOP(hcec->Init.SignalFreeTimeOption));
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assert_param(IS_CEC_LISTENING_MODE(hcec->Init.ListenMode));
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assert_param(IS_CEC_OWN_ADDRESS(hcec->Init.OwnAddress));
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if(hcec->gState == HAL_CEC_STATE_RESET)
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{
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/* Allocate lock resource and initialize it */
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hcec->Lock = HAL_UNLOCKED;
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/* Init the low level hardware : GPIO, CLOCK */
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HAL_CEC_MspInit(hcec);
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}
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hcec->gState = HAL_CEC_STATE_BUSY;
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/* Disable the Peripheral */
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__HAL_CEC_DISABLE(hcec);
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/* Write to CEC Control Register */
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hcec->Instance->CFGR = hcec->Init.SignalFreeTime | hcec->Init.Tolerance | hcec->Init.BRERxStop|\
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hcec->Init.BREErrorBitGen | hcec->Init.LBPEErrorBitGen | hcec->Init.BroadcastMsgNoErrorBitGen |\
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hcec->Init.SignalFreeTimeOption |((uint32_t)(hcec->Init.OwnAddress)<<16U) |\
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hcec->Init.ListenMode;
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/* Enable the following CEC Transmission/Reception interrupts as
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* well as the following CEC Transmission/Reception Errors interrupts
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* Rx Byte Received IT
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* End of Reception IT
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* Rx overrun
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* Rx bit rising error
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* Rx short bit period error
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* Rx long bit period error
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* Rx missing acknowledge
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* Tx Byte Request IT
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* End of Transmission IT
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* Tx Missing Acknowledge IT
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* Tx-Error IT
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* Tx-Buffer Underrun IT
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* Tx arbitration lost */
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__HAL_CEC_ENABLE_IT(hcec, CEC_IT_RXBR|CEC_IT_RXEND|CEC_IER_RX_ALL_ERR|CEC_IT_TXBR|CEC_IT_TXEND|CEC_IER_TX_ALL_ERR);
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/* Enable the CEC Peripheral */
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__HAL_CEC_ENABLE(hcec);
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hcec->ErrorCode = HAL_CEC_ERROR_NONE;
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hcec->gState = HAL_CEC_STATE_READY;
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hcec->RxState = HAL_CEC_STATE_READY;
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return HAL_OK;
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}
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/**
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* @brief DeInitializes the CEC peripheral
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* @param hcec CEC handle
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec)
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{
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/* Check the CEC handle allocation */
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if(hcec == NULL)
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{
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return HAL_ERROR;
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}
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/* Check the parameters */
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assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance));
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hcec->gState = HAL_CEC_STATE_BUSY;
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/* DeInit the low level hardware */
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HAL_CEC_MspDeInit(hcec);
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/* Disable the Peripheral */
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__HAL_CEC_DISABLE(hcec);
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/* Clear Flags */
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__HAL_CEC_CLEAR_FLAG(hcec,CEC_FLAG_TXEND|CEC_FLAG_TXBR|CEC_FLAG_RXBR|CEC_FLAG_RXEND|CEC_ISR_ALL_ERROR);
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/* Disable the following CEC Transmission/Reception interrupts as
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* well as the following CEC Transmission/Reception Errors interrupts
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* Rx Byte Received IT
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* End of Reception IT
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* Rx overrun
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* Rx bit rising error
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* Rx short bit period error
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* Rx long bit period error
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* Rx missing acknowledge
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* Tx Byte Request IT
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* End of Transmission IT
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* Tx Missing Acknowledge IT
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* Tx-Error IT
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* Tx-Buffer Underrun IT
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* Tx arbitration lost */
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__HAL_CEC_DISABLE_IT(hcec, CEC_IT_RXBR|CEC_IT_RXEND|CEC_IER_RX_ALL_ERR|CEC_IT_TXBR|CEC_IT_TXEND|CEC_IER_TX_ALL_ERR);
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hcec->ErrorCode = HAL_CEC_ERROR_NONE;
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hcec->gState = HAL_CEC_STATE_RESET;
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hcec->RxState = HAL_CEC_STATE_RESET;
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/* Process Unlock */
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__HAL_UNLOCK(hcec);
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return HAL_OK;
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}
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/**
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* @brief Initializes the Own Address of the CEC device
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* @param hcec CEC handle
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* @param CEC_OwnAddress The CEC own address.
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_CEC_SetDeviceAddress(CEC_HandleTypeDef *hcec, uint16_t CEC_OwnAddress)
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{
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/* Check the parameters */
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assert_param(IS_CEC_OWN_ADDRESS(CEC_OwnAddress));
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if ((hcec->gState == HAL_CEC_STATE_READY) && (hcec->RxState == HAL_CEC_STATE_READY))
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{
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/* Process Locked */
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__HAL_LOCK(hcec);
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hcec->gState = HAL_CEC_STATE_BUSY;
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/* Disable the Peripheral */
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__HAL_CEC_DISABLE(hcec);
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if(CEC_OwnAddress != CEC_OWN_ADDRESS_NONE)
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{
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hcec->Instance->CFGR |= ((uint32_t)CEC_OwnAddress<<16U);
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}
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else
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{
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hcec->Instance->CFGR &= ~(CEC_CFGR_OAR);
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}
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hcec->gState = HAL_CEC_STATE_READY;
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hcec->ErrorCode = HAL_CEC_ERROR_NONE;
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/* Process Unlocked */
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__HAL_UNLOCK(hcec);
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/* Enable the Peripheral */
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__HAL_CEC_ENABLE(hcec);
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return HAL_OK;
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}
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else
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{
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return HAL_BUSY;
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}
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}
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/**
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* @brief CEC MSP Init
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* @param hcec CEC handle
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* @retval None
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*/
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__weak void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec)
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{
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/* Prevent unused argument(s) compilation warning */
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UNUSED(hcec);
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/* NOTE : This function should not be modified, when the callback is needed,
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the HAL_CEC_MspInit can be implemented in the user file
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*/
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}
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/**
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* @brief CEC MSP DeInit
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* @param hcec CEC handle
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* @retval None
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*/
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__weak void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec)
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{
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/* Prevent unused argument(s) compilation warning */
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UNUSED(hcec);
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/* NOTE : This function should not be modified, when the callback is needed,
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the HAL_CEC_MspDeInit can be implemented in the user file
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*/
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}
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/**
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* @}
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*/
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/** @defgroup CEC_Exported_Functions_Group2 Input and Output operation functions
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* @brief CEC Transmit/Receive functions
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*
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@verbatim
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===============================================================================
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##### IO operation functions #####
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===============================================================================
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This subsection provides a set of functions allowing to manage the CEC data transfers.
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(#) The CEC handle must contain the initiator (TX side) and the destination (RX side)
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logical addresses (4-bit long addresses, 0x0F for broadcast messages destination)
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(#) The communication is performed using Interrupts.
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These API's return the HAL status.
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The end of the data processing will be indicated through the
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dedicated CEC IRQ when using Interrupt mode.
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The HAL_CEC_TxCpltCallback(), HAL_CEC_RxCpltCallback() user callbacks
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will be executed respectivelly at the end of the transmit or Receive process
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The HAL_CEC_ErrorCallback()user callback will be executed when a communication
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error is detected
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(#) API's with Interrupt are :
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(+) HAL_CEC_Transmit_IT()
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(+) HAL_CEC_IRQHandler()
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(#) A set of User Callbacks are provided:
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(+) HAL_CEC_TxCpltCallback()
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(+) HAL_CEC_RxCpltCallback()
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(+) HAL_CEC_ErrorCallback()
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@endverbatim
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* @{
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*/
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/**
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* @brief Send data in interrupt mode
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* @param hcec CEC handle
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* @param InitiatorAddress Initiator address
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* @param DestinationAddress destination logical address
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* @param pData pointer to input byte data buffer
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* @param Size amount of data to be sent in bytes (without counting the header).
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* 0 means only the header is sent (ping operation).
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* Maximum TX size is 15 bytes (1 opcode and up to 14 operands).
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t InitiatorAddress, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size)
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{
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/* if the IP isn't already busy and if there is no previous transmission
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already pending due to arbitration lost */
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if (hcec->gState == HAL_CEC_STATE_READY)
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{
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if((pData == NULL ) && (Size > 0U))
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{
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return HAL_ERROR;
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}
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assert_param(IS_CEC_ADDRESS(DestinationAddress));
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assert_param(IS_CEC_ADDRESS(InitiatorAddress));
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assert_param(IS_CEC_MSGSIZE(Size));
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/* Process Locked */
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__HAL_LOCK(hcec);
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hcec->pTxBuffPtr = pData;
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hcec->gState = HAL_CEC_STATE_BUSY_TX;
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hcec->ErrorCode = HAL_CEC_ERROR_NONE;
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/* initialize the number of bytes to send,
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* 0 means only one header is sent (ping operation) */
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hcec->TxXferCount = Size;
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/* in case of no payload (Size = 0), sender is only pinging the system;
|
||
|
Set TX End of Message (TXEOM) bit, must be set before writing data to TXDR */
|
||
|
if (Size == 0U)
|
||
|
{
|
||
|
__HAL_CEC_LAST_BYTE_TX_SET(hcec);
|
||
|
}
|
||
|
|
||
|
/* send header block */
|
||
|
hcec->Instance->TXDR = ((uint8_t)(InitiatorAddress << CEC_INITIATOR_LSB_POS) |(uint8_t) DestinationAddress);
|
||
|
/* Set TX Start of Message (TXSOM) bit */
|
||
|
__HAL_CEC_FIRST_BYTE_TX_SET(hcec);
|
||
|
|
||
|
/* Process Unlocked */
|
||
|
__HAL_UNLOCK(hcec);
|
||
|
|
||
|
return HAL_OK;
|
||
|
|
||
|
}
|
||
|
else
|
||
|
{
|
||
|
return HAL_BUSY;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* @brief Get size of the received frame.
|
||
|
* @param hcec CEC handle
|
||
|
* @retval Frame size
|
||
|
*/
|
||
|
uint32_t HAL_CEC_GetLastReceivedFrameSize(CEC_HandleTypeDef *hcec)
|
||
|
{
|
||
|
return hcec->RxXferSize;
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* @brief Change Rx Buffer.
|
||
|
* @param hcec CEC handle
|
||
|
* @param Rxbuffer Rx Buffer
|
||
|
* @note This function can be called only inside the HAL_CEC_RxCpltCallback()
|
||
|
* @retval Frame size
|
||
|
*/
|
||
|
void HAL_CEC_ChangeRxBuffer(CEC_HandleTypeDef *hcec, uint8_t* Rxbuffer)
|
||
|
{
|
||
|
hcec->Init.RxBuffer = Rxbuffer;
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* @brief This function handles CEC interrupt requests.
|
||
|
* @param hcec CEC handle
|
||
|
* @retval None
|
||
|
*/
|
||
|
void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec)
|
||
|
{
|
||
|
|
||
|
/* save interrupts register for further error or interrupts handling purposes */
|
||
|
uint32_t reg = 0U;
|
||
|
reg = hcec->Instance->ISR;
|
||
|
|
||
|
|
||
|
/* ----------------------------Arbitration Lost Management----------------------------------*/
|
||
|
/* CEC TX arbitration error interrupt occurred --------------------------------------*/
|
||
|
if((reg & CEC_FLAG_ARBLST) != RESET)
|
||
|
{
|
||
|
hcec->ErrorCode = HAL_CEC_ERROR_ARBLST;
|
||
|
__HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_ARBLST);
|
||
|
}
|
||
|
|
||
|
/* ----------------------------Rx Management----------------------------------*/
|
||
|
/* CEC RX byte received interrupt ---------------------------------------------------*/
|
||
|
if((reg & CEC_FLAG_RXBR) != RESET)
|
||
|
{
|
||
|
/* reception is starting */
|
||
|
hcec->RxState = HAL_CEC_STATE_BUSY_RX;
|
||
|
hcec->RxXferSize++;
|
||
|
/* read received byte */
|
||
|
*hcec->Init.RxBuffer++ = hcec->Instance->RXDR;
|
||
|
__HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXBR);
|
||
|
}
|
||
|
|
||
|
/* CEC RX end received interrupt ---------------------------------------------------*/
|
||
|
if((reg & CEC_FLAG_RXEND) != RESET)
|
||
|
{
|
||
|
/* clear IT */
|
||
|
__HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXEND);
|
||
|
|
||
|
/* Rx process is completed, restore hcec->RxState to Ready */
|
||
|
hcec->RxState = HAL_CEC_STATE_READY;
|
||
|
hcec->ErrorCode = HAL_CEC_ERROR_NONE;
|
||
|
hcec->Init.RxBuffer -= hcec->RxXferSize;
|
||
|
HAL_CEC_RxCpltCallback(hcec, hcec->RxXferSize);
|
||
|
hcec->RxXferSize = 0U;
|
||
|
}
|
||
|
|
||
|
/* ----------------------------Tx Management----------------------------------*/
|
||
|
/* CEC TX byte request interrupt ------------------------------------------------*/
|
||
|
if((reg & CEC_FLAG_TXBR) != RESET)
|
||
|
{
|
||
|
if (hcec->TxXferCount == 0U)
|
||
|
{
|
||
|
/* if this is the last byte transmission, set TX End of Message (TXEOM) bit */
|
||
|
__HAL_CEC_LAST_BYTE_TX_SET(hcec);
|
||
|
hcec->Instance->TXDR = *hcec->pTxBuffPtr++;
|
||
|
}
|
||
|
else
|
||
|
{
|
||
|
hcec->Instance->TXDR = *hcec->pTxBuffPtr++;
|
||
|
hcec->TxXferCount--;
|
||
|
}
|
||
|
/* clear Tx-Byte request flag */
|
||
|
__HAL_CEC_CLEAR_FLAG(hcec,CEC_FLAG_TXBR);
|
||
|
}
|
||
|
|
||
|
/* CEC TX end interrupt ------------------------------------------------*/
|
||
|
if((reg & CEC_FLAG_TXEND) != RESET)
|
||
|
{
|
||
|
__HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TXEND);
|
||
|
|
||
|
/* Tx process is ended, restore hcec->gState to Ready */
|
||
|
hcec->gState = HAL_CEC_STATE_READY;
|
||
|
/* Call the Process Unlocked before calling the Tx call back API to give the possibility to
|
||
|
start again the Transmission under the Tx call back API */
|
||
|
__HAL_UNLOCK(hcec);
|
||
|
hcec->ErrorCode = HAL_CEC_ERROR_NONE;
|
||
|
HAL_CEC_TxCpltCallback(hcec);
|
||
|
}
|
||
|
|
||
|
/* ----------------------------Rx/Tx Error Management----------------------------------*/
|
||
|
if ((reg & (CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE|CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)) != 0U)
|
||
|
{
|
||
|
hcec->ErrorCode = reg;
|
||
|
__HAL_CEC_CLEAR_FLAG(hcec, HAL_CEC_ERROR_RXOVR|HAL_CEC_ERROR_BRE|CEC_FLAG_LBPE|CEC_FLAG_SBPE|HAL_CEC_ERROR_RXACKE|HAL_CEC_ERROR_TXUDR|HAL_CEC_ERROR_TXERR|HAL_CEC_ERROR_TXACKE);
|
||
|
|
||
|
|
||
|
if((reg & (CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE)) != RESET)
|
||
|
{
|
||
|
hcec->Init.RxBuffer-=hcec->RxXferSize;
|
||
|
hcec->RxXferSize = 0U;
|
||
|
hcec->RxState = HAL_CEC_STATE_READY;
|
||
|
}
|
||
|
else if (((reg & (CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)) != RESET) && ((reg & CEC_ISR_ARBLST) == RESET))
|
||
|
{
|
||
|
/* Set the CEC state ready to be able to start again the process */
|
||
|
hcec->gState = HAL_CEC_STATE_READY;
|
||
|
}
|
||
|
|
||
|
/* Error Call Back */
|
||
|
HAL_CEC_ErrorCallback(hcec);
|
||
|
}
|
||
|
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* @brief Tx Transfer completed callback
|
||
|
* @param hcec CEC handle
|
||
|
* @retval None
|
||
|
*/
|
||
|
__weak void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec)
|
||
|
{
|
||
|
/* Prevent unused argument(s) compilation warning */
|
||
|
UNUSED(hcec);
|
||
|
/* NOTE : This function should not be modified, when the callback is needed,
|
||
|
the HAL_CEC_TxCpltCallback can be implemented in the user file
|
||
|
*/
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* @brief Rx Transfer completed callback
|
||
|
* @param hcec CEC handle
|
||
|
* @param RxFrameSize Size of frame
|
||
|
* @retval None
|
||
|
*/
|
||
|
__weak void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec, uint32_t RxFrameSize)
|
||
|
{
|
||
|
/* Prevent unused argument(s) compilation warning */
|
||
|
UNUSED(hcec);
|
||
|
UNUSED(RxFrameSize);
|
||
|
/* NOTE : This function should not be modified, when the callback is needed,
|
||
|
the HAL_CEC_RxCpltCallback can be implemented in the user file
|
||
|
*/
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* @brief CEC error callbacks
|
||
|
* @param hcec CEC handle
|
||
|
* @retval None
|
||
|
*/
|
||
|
__weak void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec)
|
||
|
{
|
||
|
/* Prevent unused argument(s) compilation warning */
|
||
|
UNUSED(hcec);
|
||
|
/* NOTE : This function should not be modified, when the callback is needed,
|
||
|
the HAL_CEC_ErrorCallback can be implemented in the user file
|
||
|
*/
|
||
|
}
|
||
|
/**
|
||
|
* @}
|
||
|
*/
|
||
|
|
||
|
/** @defgroup CEC_Exported_Functions_Group3 Peripheral Control function
|
||
|
* @brief CEC control functions
|
||
|
*
|
||
|
@verbatim
|
||
|
===============================================================================
|
||
|
##### Peripheral Control function #####
|
||
|
===============================================================================
|
||
|
[..]
|
||
|
This subsection provides a set of functions allowing to control the CEC.
|
||
|
(+) HAL_CEC_GetState() API can be helpful to check in run-time the state of the CEC peripheral.
|
||
|
(+) HAL_CEC_GetError() API can be helpful to check in run-time the error of the CEC peripheral.
|
||
|
@endverbatim
|
||
|
* @{
|
||
|
*/
|
||
|
/**
|
||
|
* @brief return the CEC state
|
||
|
* @param hcec pointer to a CEC_HandleTypeDef structure that contains
|
||
|
* the configuration information for the specified CEC module.
|
||
|
* @retval HAL state
|
||
|
*/
|
||
|
HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec)
|
||
|
{
|
||
|
uint32_t temp1 = 0x00U, temp2 = 0x00U;
|
||
|
temp1 = hcec->gState;
|
||
|
temp2 = hcec->RxState;
|
||
|
|
||
|
return (HAL_CEC_StateTypeDef)(temp1 | temp2);
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* @brief Return the CEC error code
|
||
|
* @param hcec pointer to a CEC_HandleTypeDef structure that contains
|
||
|
* the configuration information for the specified CEC.
|
||
|
* @retval CEC Error Code
|
||
|
*/
|
||
|
uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec)
|
||
|
{
|
||
|
return hcec->ErrorCode;
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* @}
|
||
|
*/
|
||
|
|
||
|
/**
|
||
|
* @}
|
||
|
*/
|
||
|
|
||
|
/**
|
||
|
* @}
|
||
|
*/
|
||
|
|
||
|
/**
|
||
|
* @}
|
||
|
*/
|
||
|
#endif /* defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F051x8) || defined(STM32F058xx) || */
|
||
|
/* defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || */
|
||
|
/* defined(STM32F091xC) || defined (STM32F098xx) */
|
||
|
|
||
|
#endif /* HAL_CEC_MODULE_ENABLED */
|
||
|
|
||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|