2019-07-29 06:15:54 +03:00
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// Watchdog handler on STM32
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2019-07-26 15:36:11 +03:00
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//
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// Copyright (C) 2019 Kevin O'Connor <kevin@koconnor.net>
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//
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// This file may be distributed under the terms of the GNU GPLv3 license.
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#include "internal.h" // IWDG
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#include "sched.h" // DECL_TASK
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void
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watchdog_reset(void)
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{
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IWDG->KR = 0xAAAA;
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}
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DECL_TASK(watchdog_reset);
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void
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watchdog_init(void)
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{
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IWDG->KR = 0x5555;
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IWDG->PR = 0;
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2019-07-28 21:40:41 +03:00
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IWDG->RLR = 0x0FFF; // 410-512ms timeout (depending on stm32 chip)
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2019-07-26 15:36:11 +03:00
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IWDG->KR = 0xCCCC;
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}
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DECL_INIT(watchdog_init);
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